Release 9.1.03i - xst J.33
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.
--> WARNING:Xst:1583 - You are using an internal switch '-report_timing_constraint_problems'.

TABLE OF CONTENTS
  1) Synthesis Options Summary
  2) HDL Compilation
  3) Design Hierarchy Analysis
  4) HDL Analysis
  5) HDL Synthesis
     5.1) HDL Synthesis Report
  6) Advanced HDL Synthesis
     6.1) Advanced HDL Synthesis Report
  7) Low Level Synthesis
  8) Partition Report
  9) Final Report
     9.1) Device utilization summary
     9.2) Partition Resource Summary
     9.3) TIMING REPORT


=========================================================================
*                      Synthesis Options Summary                        *
=========================================================================
---- Source Parameters
Input File Name                    : "xst_expres4g1024m.prj"
Input Format                       : mixed

---- Target Parameters
Output File Name                   : "expres4g1024m_cw.ngc"
Output Format                      : NGC
Target Device                      : xc2vp50-7ff1152

---- Source Options
Entity Name                        : expres4g1024m_cw
Top Module Name                    : expres4g1024m_cw
Automatic Register Balancing       : no

---- Target Options
Add IO Buffers                     : NO
Pack IO Registers into IOBs        : Auto

---- General Options
Keep Hierarchy                     : NO
Bus Delimiter                      : ()
Hierarchy Separator                : /

---- Other Options
report_timing_constraint_problems  : warning

=========================================================================

WARNING:Xst:29 - Optimization Effort not specified
The following parameters have been added:
Optimization Goal                  : SPEED
Optimization Effort                : 1

=========================================================================

=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" in Library work.
Entity <adder_subtracter_virtex2p_7_0_23d84c584623d65e> compiled.
Entity <adder_subtracter_virtex2p_7_0_23d84c584623d65e> (Architecture <adder_subtracter_virtex2p_7_0_23d84c584623d65e_a>) compiled.
Package <conv_pkg> compiled.
Package body <conv_pkg> compiled.
Package <clock_pkg> compiled.
Entity <srl17e> compiled.
Entity <srl17e> (Architecture <structural>) compiled.
Entity <synth_reg> compiled.
Entity <synth_reg> (Architecture <structural>) compiled.
Entity <synth_reg_reg> compiled.
Entity <synth_reg_reg> (Architecture <behav>) compiled.
Entity <single_reg_w_init> compiled.
Entity <single_reg_w_init> (Architecture <structural>) compiled.
Entity <synth_reg_w_init> compiled.
Entity <synth_reg_w_init> (Architecture <structural>) compiled.
Entity <concat1_91f6e5894e> compiled.
Entity <concat1_91f6e5894e> (Architecture <behavior>) compiled.
Entity <reinterpret1_421868fdcf> compiled.
Entity <reinterpret1_421868fdcf> (Architecture <behavior>) compiled.
Entity <reinterpret2_af838af55d> compiled.
Entity <reinterpret2_af838af55d> (Architecture <behavior>) compiled.
Entity <reinterpret3_8118b8df3f> compiled.
Entity <reinterpret3_8118b8df3f> (Architecture <behavior>) compiled.
Entity <reinterpret4_b77a7b0ce0> compiled.
Entity <reinterpret4_b77a7b0ce0> (Architecture <behavior>) compiled.
Entity <concat1_8254fe26d1> compiled.
Entity <concat1_8254fe26d1> (Architecture <behavior>) compiled.
Entity <reinterpret1_209a7f1ccf> compiled.
Entity <reinterpret1_209a7f1ccf> (Architecture <behavior>) compiled.
Entity <reinterpret2_f735414ec3> compiled.
Entity <reinterpret2_f735414ec3> (Architecture <behavior>) compiled.
Entity <reinterpret3_f487f886c1> compiled.
Entity <reinterpret3_f487f886c1> (Architecture <behavior>) compiled.
Entity <reinterpret4_5b4e0dc295> compiled.
Entity <reinterpret4_5b4e0dc295> (Architecture <behavior>) compiled.
Entity <reinterpret4_2cede6fcef> compiled.
Entity <reinterpret4_2cede6fcef> (Architecture <behavior>) compiled.
Entity <reinterpret5_ddc5355546> compiled.
Entity <reinterpret5_ddc5355546> (Architecture <behavior>) compiled.
Entity <reinterpret6_0562bbbdfa> compiled.
Entity <reinterpret6_0562bbbdfa> (Architecture <behavior>) compiled.
Entity <reinterpret7_28693a4e8c> compiled.
Entity <reinterpret7_28693a4e8c> (Architecture <behavior>) compiled.
Entity <bit0_eab550d1c0> compiled.
Entity <bit0_eab550d1c0> (Architecture <behavior>) compiled.
Entity <bit16_f5ebc38801> compiled.
Entity <bit16_f5ebc38801> (Architecture <behavior>) compiled.
Entity <bit24_c653e87f15> compiled.
Entity <bit24_c653e87f15> (Architecture <behavior>) compiled.
Entity <bit8_6a4da2d14b> compiled.
Entity <bit8_6a4da2d14b> (Architecture <behavior>) compiled.
Entity <reinterpret4_0bfe5a8dd8> compiled.
Entity <reinterpret4_0bfe5a8dd8> (Architecture <behavior>) compiled.
Entity <reinterpret5_ad5fcc0cc6> compiled.
Entity <reinterpret5_ad5fcc0cc6> (Architecture <behavior>) compiled.
Entity <reinterpret6_0f88bc95f6> compiled.
Entity <reinterpret6_0f88bc95f6> (Architecture <behavior>) compiled.
Entity <reinterpret7_1f25723006> compiled.
Entity <reinterpret7_1f25723006> (Architecture <behavior>) compiled.
Entity <bit0_5b70faa9e1> compiled.
Entity <bit0_5b70faa9e1> (Architecture <behavior>) compiled.
Entity <bit16_0899a8c2cd> compiled.
Entity <bit16_0899a8c2cd> (Architecture <behavior>) compiled.
Entity <bit24_6703f73bb4> compiled.
Entity <bit24_6703f73bb4> (Architecture <behavior>) compiled.
Entity <bit8_a5f685fcb4> compiled.
Entity <bit8_a5f685fcb4> (Architecture <behavior>) compiled.
Entity <concat_d694665e71> compiled.
Entity <concat_d694665e71> (Architecture <behavior>) compiled.
Entity <concat1_3055210e70> compiled.
Entity <concat1_3055210e70> (Architecture <behavior>) compiled.
Entity <concat2_7c7ec05f81> compiled.
Entity <concat2_7c7ec05f81> (Architecture <behavior>) compiled.
Entity <concat3_c4dc34b1a7> compiled.
Entity <concat3_c4dc34b1a7> (Architecture <behavior>) compiled.
Entity <constant1_699d7f1eeb> compiled.
Entity <constant1_699d7f1eeb> (Architecture <behavior>) compiled.
Entity <constant2_5f1cd7b048> compiled.
Entity <constant2_5f1cd7b048> (Architecture <behavior>) compiled.
Entity <constant3_d786e11d4e> compiled.
Entity <constant3_d786e11d4e> (Architecture <behavior>) compiled.
Entity <constant4_21438855e4> compiled.
Entity <constant4_21438855e4> (Architecture <behavior>) compiled.
Entity <constant5_075adb46bf> compiled.
Entity <constant5_075adb46bf> (Architecture <behavior>) compiled.
Entity <constant6_49c14364ee> compiled.
Entity <constant6_49c14364ee> (Architecture <behavior>) compiled.
Entity <concat_df7186a2e1> compiled.
Entity <concat_df7186a2e1> (Architecture <behavior>) compiled.
Entity <constant8_cb133a1117> compiled.
Entity <constant8_cb133a1117> (Architecture <behavior>) compiled.
Entity <xlpassthrough> compiled.
Entity <xlpassthrough> (Architecture <passthrough_arch>) compiled.
Entity <lsb1_e6a95c1af1> compiled.
Entity <lsb1_e6a95c1af1> (Architecture <behavior>) compiled.
Entity <lsb3_b3a1c0e2cd> compiled.
Entity <lsb3_b3a1c0e2cd> (Architecture <behavior>) compiled.
Entity <sl_5lsb_82c15f848e> compiled.
Entity <sl_5lsb_82c15f848e> (Architecture <behavior>) compiled.
Entity <sl_5lsb_1_85931bdd03> compiled.
Entity <sl_5lsb_1_85931bdd03> (Architecture <behavior>) compiled.
Entity <sl_byte0_4d9050d309> compiled.
Entity <sl_byte0_4d9050d309> (Architecture <behavior>) compiled.
Entity <sl_byte1_21a54b9e61> compiled.
Entity <sl_byte1_21a54b9e61> (Architecture <behavior>) compiled.
Entity <sl_byte2_3628a88f76> compiled.
Entity <sl_byte2_3628a88f76> (Architecture <behavior>) compiled.
Entity <sl_byte3_9d1210cfbd> compiled.
Entity <sl_byte3_9d1210cfbd> (Architecture <behavior>) compiled.
Entity <inverter2_2ab0852d89> compiled.
Entity <inverter2_2ab0852d89> (Architecture <behavior>) compiled.
Entity <logical1_dc01bcb7e5> compiled.
Entity <logical1_dc01bcb7e5> (Architecture <behavior>) compiled.
Entity <concat_bc5e36d4ea> compiled.
Entity <concat_bc5e36d4ea> (Architecture <behavior>) compiled.
Entity <inverter_e88d30344f> compiled.
Entity <inverter_e88d30344f> (Architecture <behavior>) compiled.
Entity <reinterpret_bb5704daa0> compiled.
Entity <reinterpret_bb5704daa0> (Architecture <behavior>) compiled.
Entity <slice_ada6dabeed> compiled.
Entity <slice_ada6dabeed> (Architecture <behavior>) compiled.
Entity <slice1_024135aade> compiled.
Entity <slice1_024135aade> (Architecture <behavior>) compiled.
Entity <concat_ddc54e5835> compiled.
Entity <concat_ddc54e5835> (Architecture <behavior>) compiled.
Entity <inverter_b526fbe439> compiled.
Entity <inverter_b526fbe439> (Architecture <behavior>) compiled.
Entity <reinterpret_d4aaa1bdfb> compiled.
Entity <reinterpret_d4aaa1bdfb> (Architecture <behavior>) compiled.
Entity <slice_548b816da1> compiled.
Entity <slice_548b816da1> (Architecture <behavior>) compiled.
Entity <slice1_ca2b52d742> compiled.
Entity <slice1_ca2b52d742> (Architecture <behavior>) compiled.
Entity <concat_c2ceb1b433> compiled.
Entity <concat_c2ceb1b433> (Architecture <behavior>) compiled.
Entity <inverter_2f02a7b0ae> compiled.
Entity <inverter_2f02a7b0ae> (Architecture <behavior>) compiled.
Entity <reinterpret_b4b31b4648> compiled.
Entity <reinterpret_b4b31b4648> (Architecture <behavior>) compiled.
Entity <slice_1145e8f1a6> compiled.
Entity <slice_1145e8f1a6> (Architecture <behavior>) compiled.
Entity <slice1_30272eab40> compiled.
Entity <slice1_30272eab40> (Architecture <behavior>) compiled.
Entity <concat_f31155dc36> compiled.
Entity <concat_f31155dc36> (Architecture <behavior>) compiled.
Entity <inverter_deb105cfd5> compiled.
Entity <inverter_deb105cfd5> (Architecture <behavior>) compiled.
Entity <reinterpret_1953f27fdf> compiled.
Entity <reinterpret_1953f27fdf> (Architecture <behavior>) compiled.
Entity <slice_17b71bf882> compiled.
Entity <slice_17b71bf882> (Architecture <behavior>) compiled.
Entity <slice1_b8da15b44a> compiled.
Entity <slice1_b8da15b44a> (Architecture <behavior>) compiled.
Entity <concat_8f2a4bed20> compiled.
Entity <concat_8f2a4bed20> (Architecture <behavior>) compiled.
Entity <inverter_f6278b222a> compiled.
Entity <inverter_f6278b222a> (Architecture <behavior>) compiled.
Entity <reinterpret_28813488a0> compiled.
Entity <reinterpret_28813488a0> (Architecture <behavior>) compiled.
Entity <slice_4086228a71> compiled.
Entity <slice_4086228a71> (Architecture <behavior>) compiled.
Entity <slice1_dc1027beb6> compiled.
Entity <slice1_dc1027beb6> (Architecture <behavior>) compiled.
Entity <concat_c6213979ad> compiled.
Entity <concat_c6213979ad> (Architecture <behavior>) compiled.
Entity <inverter_14e3210e70> compiled.
Entity <inverter_14e3210e70> (Architecture <behavior>) compiled.
Entity <reinterpret_c607a35a29> compiled.
Entity <reinterpret_c607a35a29> (Architecture <behavior>) compiled.
Entity <slice_d1e6bddb3b> compiled.
Entity <slice_d1e6bddb3b> (Architecture <behavior>) compiled.
Entity <slice1_c85fcf892b> compiled.
Entity <slice1_c85fcf892b> (Architecture <behavior>) compiled.
Entity <concat_abceb0e700> compiled.
Entity <concat_abceb0e700> (Architecture <behavior>) compiled.
Entity <inverter_1583af95f1> compiled.
Entity <inverter_1583af95f1> (Architecture <behavior>) compiled.
Entity <reinterpret_7eef37775d> compiled.
Entity <reinterpret_7eef37775d> (Architecture <behavior>) compiled.
Entity <slice_58a5b34657> compiled.
Entity <slice_58a5b34657> (Architecture <behavior>) compiled.
Entity <slice1_94a4a96ba5> compiled.
Entity <slice1_94a4a96ba5> (Architecture <behavior>) compiled.
Entity <concat_c79d543ed9> compiled.
Entity <concat_c79d543ed9> (Architecture <behavior>) compiled.
Entity <inverter_8ce249e4c9> compiled.
Entity <inverter_8ce249e4c9> (Architecture <behavior>) compiled.
Entity <reinterpret_955f8abbef> compiled.
Entity <reinterpret_955f8abbef> (Architecture <behavior>) compiled.
Entity <slice_510bfcefde> compiled.
Entity <slice_510bfcefde> (Architecture <behavior>) compiled.
Entity <slice1_a788d95eec> compiled.
Entity <slice1_a788d95eec> (Architecture <behavior>) compiled.
Entity <convert_func_call> compiled.
Entity <convert_func_call> (Architecture <behavior>) compiled.
Entity <xlconvert> compiled.
Entity <xlconvert> (Architecture <behavior>) compiled.
Entity <xladdsub> compiled.
Entity <xladdsub> (Architecture <behavior>) compiled.
Entity <constant1_2ba2b4f03c> compiled.
Entity <constant1_2ba2b4f03c> (Architecture <behavior>) compiled.
Entity <constant2_a7a5800303> compiled.
Entity <constant2_a7a5800303> (Architecture <behavior>) compiled.
Entity <constant3_2994ece7ca> compiled.
Entity <constant3_2994ece7ca> (Architecture <behavior>) compiled.
Entity <constant4_ad9ae8727a> compiled.
Entity <constant4_ad9ae8727a> (Architecture <behavior>) compiled.
Entity <constant5_f77e6e4b80> compiled.
Entity <constant5_f77e6e4b80> (Architecture <behavior>) compiled.
Entity <constant6_4c5259419a> compiled.
Entity <constant6_4c5259419a> (Architecture <behavior>) compiled.
Entity <constant7_5a759dc8e0> compiled.
Entity <constant7_5a759dc8e0> (Architecture <behavior>) compiled.
Entity <constant8_738ac8f738> compiled.
Entity <constant8_738ac8f738> (Architecture <behavior>) compiled.
Entity <constant9_7040000009> compiled.
Entity <constant9_7040000009> (Architecture <behavior>) compiled.
Entity <logical_093b0449cf> compiled.
Entity <logical_093b0449cf> (Architecture <behavior>) compiled.
Entity <bitreducer8to2_v10> compiled.
Entity <bitreducer8to2_v10> (Architecture <Behavioral>) compiled.
Entity <bl_byte0_85614cf66d> compiled.
Entity <bl_byte0_85614cf66d> (Architecture <behavior>) compiled.
Entity <bl_byte1_4dee1560eb> compiled.
Entity <bl_byte1_4dee1560eb> (Architecture <behavior>) compiled.
Entity <bl_byte2_87e71d2c59> compiled.
Entity <bl_byte2_87e71d2c59> (Architecture <behavior>) compiled.
Entity <bl_byte3_62ea3ff720> compiled.
Entity <bl_byte3_62ea3ff720> (Architecture <behavior>) compiled.
Entity <xldelay> compiled.
Entity <xldelay> (Architecture <behavior>) compiled.
Entity <lsb1_618afcaae2> compiled.
Entity <lsb1_618afcaae2> (Architecture <behavior>) compiled.
Entity <rtc32_v14> compiled.
Entity <rtc32_v14> (Architecture <Behavioral>) compiled.
Entity <sl_10lsb_4817575a2c> compiled.
Entity <sl_10lsb_4817575a2c> (Architecture <behavior>) compiled.
Entity <sl_10lsb1_e3e25df95e> compiled.
Entity <sl_10lsb1_e3e25df95e> (Architecture <behavior>) compiled.
Entity <simpleFIFO> compiled.
Entity <simpleFIFO> (Architecture <behavioral>) compiled.
Entity <vdif_packetizer_v15> compiled.
Entity <vdif_packetizer_v15> (Architecture <Behavioral>) compiled.
Entity <xlregister> compiled.
Entity <xlregister> (Architecture <behavior>) compiled.
Entity <adccat1_entity_e02ada5f8a> compiled.
Entity <adccat1_entity_e02ada5f8a> (Architecture <structural>) compiled.
Entity <adccat2_entity_ceac40d612> compiled.
Entity <adccat2_entity_ceac40d612> (Architecture <structural>) compiled.
Entity <adcuncat1_entity_eb19c49dca> compiled.
Entity <adcuncat1_entity_eb19c49dca> (Architecture <structural>) compiled.
Entity <adcuncat2_entity_4514881654> compiled.
Entity <adcuncat2_entity_4514881654> (Architecture <structural>) compiled.
Entity <assemblestatus_entity_7fd680fdc6> compiled.
Entity <assemblestatus_entity_7fd680fdc6> (Architecture <structural>) compiled.
Entity <configsys_entity_72b77062d8> compiled.
Entity <configsys_entity_72b77062d8> (Architecture <structural>) compiled.
Entity <posedge_entity_aac04e502a> compiled.
Entity <posedge_entity_aac04e502a> (Architecture <structural>) compiled.
Entity <conv_entity_f5df0b0e65> compiled.
Entity <conv_entity_f5df0b0e65> (Architecture <structural>) compiled.
Entity <conv1_entity_99e0255406> compiled.
Entity <conv1_entity_99e0255406> (Architecture <structural>) compiled.
Entity <conv2_entity_8ea5768454> compiled.
Entity <conv2_entity_8ea5768454> (Architecture <structural>) compiled.
Entity <conv3_entity_96c1e66e28> compiled.
Entity <conv3_entity_96c1e66e28> (Architecture <structural>) compiled.
Entity <conv4_entity_91fe140263> compiled.
Entity <conv4_entity_91fe140263> (Architecture <structural>) compiled.
Entity <conv5_entity_d456057b01> compiled.
Entity <conv5_entity_d456057b01> (Architecture <structural>) compiled.
Entity <conv6_entity_98cfaee0c2> compiled.
Entity <conv6_entity_98cfaee0c2> (Architecture <structural>) compiled.
Entity <conv7_entity_c2e26db709> compiled.
Entity <conv7_entity_c2e26db709> (Architecture <structural>) compiled.
Entity <adc_entity_9852d04a8e> compiled.
Entity <adc_entity_9852d04a8e> (Architecture <structural>) compiled.
Entity <adc_data_i_entity_a3a8938725> compiled.
Entity <adc_data_i_entity_a3a8938725> (Architecture <structural>) compiled.
Entity <adc_data_q_entity_64b50d7ffe> compiled.
Entity <adc_data_q_entity_64b50d7ffe> (Architecture <structural>) compiled.
Entity <led0_entity_adcb04e180> compiled.
Entity <led0_entity_adcb04e180> (Architecture <structural>) compiled.
Entity <led1_entity_6df427b2a9> compiled.
Entity <led1_entity_6df427b2a9> (Architecture <structural>) compiled.
Entity <led2_entity_a89ed2d92f> compiled.
Entity <led2_entity_a89ed2d92f> (Architecture <structural>) compiled.
Entity <led3_entity_de4918e802> compiled.
Entity <led3_entity_de4918e802> (Architecture <structural>) compiled.
Entity <led6_entity_89f383e74d> compiled.
Entity <led6_entity_89f383e74d> (Architecture <structural>) compiled.
Entity <led7_entity_fc9cf74af9> compiled.
Entity <led7_entity_fc9cf74af9> (Architecture <structural>) compiled.
Entity <rtc_time_entity_e8033653dc> compiled.
Entity <rtc_time_entity_e8033653dc> (Architecture <structural>) compiled.
Entity <status_entity_c438123aa7> compiled.
Entity <status_entity_c438123aa7> (Architecture <structural>) compiled.
Entity <ten_gbe1_entity_b0a1ef16c5> compiled.
Entity <ten_gbe1_entity_b0a1ef16c5> (Architecture <structural>) compiled.
Entity <ten_gbe2_entity_ddd9f696b9> compiled.
Entity <ten_gbe2_entity_ddd9f696b9> (Architecture <structural>) compiled.
Entity <twobit_data_i_entity_0b92d44297> compiled.
Entity <twobit_data_i_entity_0b92d44297> (Architecture <structural>) compiled.
Entity <twobit_data_q_entity_b7296da730> compiled.
Entity <twobit_data_q_entity_b7296da730> (Architecture <structural>) compiled.
Entity <expres4g1024m> compiled.
Entity <expres4g1024m> (Architecture <structural>) compiled.
Compiling vhdl file "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m_cw.vhd" in Library work.
Entity <xlclkprobe> compiled.
Entity <xlclkprobe> (Architecture <behavior>) compiled.
Entity <xlclockdriver> compiled.
Entity <xlclockdriver> (Architecture <behavior>) compiled.
Entity <expres4g1024M_clock_driver> compiled.
Entity <expres4g1024M_clock_driver> (Architecture <structural>) compiled.
Entity <expres4g1024m_cw> compiled.
Entity <expres4g1024m_cw> (Architecture <structural>) compiled.

=========================================================================
*                     Design Hierarchy Analysis                         *
=========================================================================
Analyzing hierarchy for entity <expres4g1024m_cw> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <xlclkprobe> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <expres4g1024M_clock_driver> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <expres4g1024m> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <xlclockdriver> in library <work> (architecture <behavior>) with generics.
	log_2_period = 1
	period = 1
	pipeline_regs = 5
	use_bufg = 0

Analyzing hierarchy for entity <adc_entity_9852d04a8e> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <adc_data_i_entity_a3a8938725> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <adc_data_q_entity_64b50d7ffe> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <adccat1_entity_e02ada5f8a> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <adccat2_entity_ceac40d612> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <adcuncat1_entity_eb19c49dca> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <adcuncat2_entity_4514881654> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <xladdsub> in library <work> (architecture <behavior>) with generics.
	a_arith = 1
	a_bin_pt = 0
	a_width = 32
	b_arith = 1
	b_bin_pt = 0
	b_width = 32
	c_has_b_out = 0
	c_has_c_out = 0
	c_has_ovfl = 0
	c_has_q = 1
	c_has_q_b_out = 0
	c_has_q_c_out = 0
	c_has_q_ovfl = 0
	c_has_s = 0
	c_in_arith = 1
	c_in_bin_pt = 4
	c_in_width = 16
	c_latency = 1
	c_out_arith = 1
	c_out_bin_pt = 4
	c_out_width = 16
	c_output_width = 33
	core_name0 = "adder_subtracter_virtex2p_7_0_23d84c584623d65e"
	en_arith = 1
	en_bin_pt = 0
	en_width = 1
	extra_registers = 0
	full_s_arith = 1
	full_s_width = 33
	latency = 1
	mode = 1
	overflow = 1
	quantization = 1
	rst_arith = 1
	rst_bin_pt = 0
	rst_width = 1
	s_arith = 1
	s_bin_pt = 0
	s_width = 33

Analyzing hierarchy for entity <assemblestatus_entity_7fd680fdc6> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <bitreducer8to2_v10> in library <work> (architecture <Behavioral>).

Analyzing hierarchy for entity <bl_byte0_85614cf66d> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bl_byte1_4dee1560eb> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bl_byte2_87e71d2c59> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bl_byte3_62ea3ff720> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <configsys_entity_72b77062d8> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <constant1_2ba2b4f03c> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant2_a7a5800303> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant3_2994ece7ca> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant4_ad9ae8727a> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant5_f77e6e4b80> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant6_4c5259419a> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant7_5a759dc8e0> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant8_738ac8f738> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant9_7040000009> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <xlconvert> in library <work> (architecture <behavior>) with generics.
	bool_conversion = 1
	din_arith = 1
	din_bin_pt = 0
	din_width = 1
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 1
	latency = 0
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <xldelay> in library <work> (architecture <behavior>) with generics.
	latency = 16
	reg_retiming = 0
	width = 64

Analyzing hierarchy for entity <xldelay> in library <work> (architecture <behavior>) with generics.
	latency = 16
	reg_retiming = 0
	width = 1

Analyzing hierarchy for entity <xldelay> in library <work> (architecture <behavior>) with generics.
	latency = 4
	reg_retiming = 0
	width = 32

Analyzing hierarchy for entity <xldelay> in library <work> (architecture <behavior>) with generics.
	latency = 4
	reg_retiming = 0
	width = 1

Analyzing hierarchy for entity <xldelay> in library <work> (architecture <behavior>) with generics.
	latency = 16
	reg_retiming = 0
	width = 32

Analyzing hierarchy for entity <xldelay> in library <work> (architecture <behavior>) with generics.
	latency = 16
	reg_retiming = 0
	width = 33

Analyzing hierarchy for entity <xldelay> in library <work> (architecture <behavior>) with generics.
	latency = 4
	reg_retiming = 0
	width = 92

Analyzing hierarchy for entity <led0_entity_adcb04e180> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <led1_entity_6df427b2a9> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <led2_entity_a89ed2d92f> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <led3_entity_de4918e802> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <led6_entity_89f383e74d> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <led7_entity_fc9cf74af9> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <logical_093b0449cf> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <lsb1_618afcaae2> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <posedge_entity_aac04e502a> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <xlregister> in library <work> (architecture <behavior>) with generics.
	d_width = 64
	init_value = "0000000000000000000000000000000000000000000000000000000000000000"

Analyzing hierarchy for entity <rtc32_v14> in library <work> (architecture <Behavioral>) with generics.
	SYS_FREQ_HZ = 256000000

Analyzing hierarchy for entity <rtc_time_entity_e8033653dc> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <sl_10lsb_4817575a2c> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <sl_10lsb1_e3e25df95e> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <status_entity_c438123aa7> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <ten_gbe1_entity_b0a1ef16c5> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <ten_gbe2_entity_ddd9f696b9> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <twobit_data_i_entity_0b92d44297> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <twobit_data_q_entity_b7296da730> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <vdif_packetizer_v15> in library <work> (architecture <Behavioral>) with generics.
	frameCountLimit = 67108864
	frameLenLimit = 4096

Analyzing hierarchy for entity <synth_reg_w_init> in library <work> (architecture <structural>) with generics.
	init_index = 0
	init_value = "0000"
	latency = 1
	width = 1

Analyzing hierarchy for entity <conv1_entity_99e0255406> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <conv2_entity_8ea5768454> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <conv3_entity_96c1e66e28> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <conv4_entity_91fe140263> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <conv5_entity_d456057b01> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <conv6_entity_98cfaee0c2> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <conv7_entity_c2e26db709> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <conv_entity_f5df0b0e65> in library <work> (architecture <structural>).

Analyzing hierarchy for entity <xlconvert> in library <work> (architecture <behavior>) with generics.
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 32
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	latency = 0
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <concat1_91f6e5894e> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret1_421868fdcf> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret2_af838af55d> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret3_8118b8df3f> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret4_b77a7b0ce0> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat1_8254fe26d1> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret1_209a7f1ccf> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret2_f735414ec3> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret3_f487f886c1> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret4_5b4e0dc295> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bit0_eab550d1c0> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bit16_f5ebc38801> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bit24_c653e87f15> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bit8_6a4da2d14b> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret4_2cede6fcef> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret5_ddc5355546> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret6_0562bbbdfa> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret7_28693a4e8c> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bit0_5b70faa9e1> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bit16_0899a8c2cd> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bit24_6703f73bb4> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <bit8_a5f685fcb4> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret4_0bfe5a8dd8> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret5_ad5fcc0cc6> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret6_0f88bc95f6> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret7_1f25723006> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_d694665e71> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat1_3055210e70> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat2_7c7ec05f81> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat3_c4dc34b1a7> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant1_699d7f1eeb> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant2_5f1cd7b048> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant3_d786e11d4e> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant4_21438855e4> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant5_075adb46bf> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant6_49c14364ee> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_df7186a2e1> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <constant8_cb133a1117> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <lsb1_e6a95c1af1> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <lsb3_b3a1c0e2cd> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <xlpassthrough> in library <work> (architecture <passthrough_arch>) with generics.
	din_width = 1
	dout_width = 1

Analyzing hierarchy for entity <xlpassthrough> in library <work> (architecture <passthrough_arch>) with generics.
	din_width = 16
	dout_width = 16

Analyzing hierarchy for entity <xlpassthrough> in library <work> (architecture <passthrough_arch>) with generics.
	din_width = 5
	dout_width = 5

Analyzing hierarchy for entity <sl_5lsb_82c15f848e> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <sl_5lsb_1_85931bdd03> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <sl_byte0_4d9050d309> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <sl_byte1_21a54b9e61> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <sl_byte2_3628a88f76> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <sl_byte3_9d1210cfbd> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <synth_reg> in library <work> (architecture <structural>) with generics.
	latency = 16
	width = 64

Analyzing hierarchy for entity <synth_reg> in library <work> (architecture <structural>) with generics.
	latency = 16
	width = 1

Analyzing hierarchy for entity <synth_reg> in library <work> (architecture <structural>) with generics.
	latency = 4
	width = 32

Analyzing hierarchy for entity <synth_reg> in library <work> (architecture <structural>) with generics.
	latency = 4
	width = 1

Analyzing hierarchy for entity <synth_reg> in library <work> (architecture <structural>) with generics.
	latency = 16
	width = 32

Analyzing hierarchy for entity <synth_reg> in library <work> (architecture <structural>) with generics.
	latency = 16
	width = 33

Analyzing hierarchy for entity <synth_reg> in library <work> (architecture <structural>) with generics.
	latency = 4
	width = 92

Analyzing hierarchy for entity <xlconvert> in library <work> (architecture <behavior>) with generics.
	bool_conversion = 1
	din_arith = 1
	din_bin_pt = 0
	din_width = 1
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 1
	latency = 0
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <inverter2_2ab0852d89> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <logical1_dc01bcb7e5> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <synth_reg_w_init> in library <work> (architecture <structural>) with generics.
	init_index = 2
	init_value = "0000000000000000000000000000000000000000000000000000000000000000"
	latency = 1
	width = 64

Analyzing hierarchy for entity <xlconvert> in library <work> (architecture <behavior>) with generics.
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 92
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	latency = 0
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <xlconvert> in library <work> (architecture <behavior>) with generics.
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 64
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 64
	latency = 0
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <xlconvert> in library <work> (architecture <behavior>) with generics.
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 33
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 16
	latency = 0
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <xlconvert> in library <work> (architecture <behavior>) with generics.
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 32
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 16
	latency = 0
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <xlconvert> in library <work> (architecture <behavior>) with generics.
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 64
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	latency = 0
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <simpleFIFO> in library <work> (architecture <behavioral>) with generics.
	depth = 10
	width = 64

Analyzing hierarchy for entity <single_reg_w_init> in library <work> (architecture <structural>) with generics.
	init_index = 0
	init_value = "0000"
	width = 1

Analyzing hierarchy for entity <concat_ddc54e5835> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <inverter_b526fbe439> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret_d4aaa1bdfb> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice_548b816da1> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice1_ca2b52d742> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_c2ceb1b433> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <inverter_2f02a7b0ae> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret_b4b31b4648> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice_1145e8f1a6> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice1_30272eab40> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_f31155dc36> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <inverter_deb105cfd5> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret_1953f27fdf> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice_17b71bf882> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice1_b8da15b44a> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_8f2a4bed20> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <inverter_f6278b222a> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret_28813488a0> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice_4086228a71> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice1_dc1027beb6> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_c6213979ad> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <inverter_14e3210e70> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret_c607a35a29> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice_d1e6bddb3b> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice1_c85fcf892b> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_abceb0e700> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <inverter_1583af95f1> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret_7eef37775d> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice_58a5b34657> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice1_94a4a96ba5> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_c79d543ed9> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <inverter_8ce249e4c9> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret_955f8abbef> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice_510bfcefde> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice1_a788d95eec> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <concat_bc5e36d4ea> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <inverter_e88d30344f> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <reinterpret_bb5704daa0> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice_ada6dabeed> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <slice1_024135aade> in library <work> (architecture <behavior>).

Analyzing hierarchy for entity <convert_func_call> in library <work> (architecture <behavior>) with generics.
	din_arith = 1
	din_bin_pt = 0
	din_width = 32
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <srl17e> in library <work> (architecture <structural>) with generics.
	latency = 16
	width = 64

Analyzing hierarchy for entity <srl17e> in library <work> (architecture <structural>) with generics.
	latency = 16
	width = 1

Analyzing hierarchy for entity <srl17e> in library <work> (architecture <structural>) with generics.
	latency = 4
	width = 32

Analyzing hierarchy for entity <srl17e> in library <work> (architecture <structural>) with generics.
	latency = 4
	width = 1

Analyzing hierarchy for entity <srl17e> in library <work> (architecture <structural>) with generics.
	latency = 16
	width = 32

Analyzing hierarchy for entity <srl17e> in library <work> (architecture <structural>) with generics.
	latency = 16
	width = 33

Analyzing hierarchy for entity <srl17e> in library <work> (architecture <structural>) with generics.
	latency = 4
	width = 92

Analyzing hierarchy for entity <single_reg_w_init> in library <work> (architecture <structural>) with generics.
	init_index = 2
	init_value = "0000000000000000000000000000000000000000000000000000000000000000"
	width = 64

Analyzing hierarchy for entity <convert_func_call> in library <work> (architecture <behavior>) with generics.
	din_arith = 1
	din_bin_pt = 0
	din_width = 92
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <convert_func_call> in library <work> (architecture <behavior>) with generics.
	din_arith = 1
	din_bin_pt = 0
	din_width = 64
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 64
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <convert_func_call> in library <work> (architecture <behavior>) with generics.
	din_arith = 1
	din_bin_pt = 0
	din_width = 33
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 16
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <convert_func_call> in library <work> (architecture <behavior>) with generics.
	din_arith = 1
	din_bin_pt = 0
	din_width = 32
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 16
	overflow = 1
	quantization = 1

Analyzing hierarchy for entity <convert_func_call> in library <work> (architecture <behavior>) with generics.
	din_arith = 1
	din_bin_pt = 0
	din_width = 64
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	overflow = 1
	quantization = 1


=========================================================================
*                            HDL Analysis                               *
=========================================================================
Analyzing Entity <expres4g1024m_cw> in library <work> (Architecture <structural>).
    Set property "syn_keep = TRUE" for signal <persistentdff_inst_q>.
WARNING:Xst:37 - Unknown property "preserve_signal".
WARNING:Xst:753 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m_cw.vhd" line 696: Unconnected output port 'fakeOutForXst' of component 'xlclkprobe'.
WARNING:Xst:37 - Unknown property "dont_touch".
    Set property "optimize_primitives = FALSE" for instance <persistentdff_inst> in unit <expres4g1024m_cw>.
    Set property "syn_black_box = TRUE" for instance <persistentdff_inst> in unit <expres4g1024m_cw>.
    Set property "syn_noprune = TRUE" for instance <persistentdff_inst> in unit <expres4g1024m_cw>.
Entity <expres4g1024m_cw> analyzed. Unit <expres4g1024m_cw> generated.

Analyzing Entity <xlclkprobe> in library <work> (Architecture <behavior>).
Entity <xlclkprobe> analyzed. Unit <xlclkprobe> generated.

Analyzing Entity <expres4g1024M_clock_driver> in library <work> (Architecture <structural>).
    Set property "syn_noprune = TRUE" for unit <expres4g1024M_clock_driver>.
WARNING:Xst:37 - Unknown property "dont_touch".
WARNING:Xst:753 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m_cw.vhd" line 391: Unconnected output port 'clr' of component 'xlclockdriver'.
Entity <expres4g1024M_clock_driver> analyzed. Unit <expres4g1024M_clock_driver> generated.

Analyzing generic Entity <xlclockdriver> in library <work> (Architecture <behavior>).
	log_2_period = 1
	period = 1
	pipeline_regs = 5
	use_bufg = 0
Entity <xlclockdriver> analyzed. Unit <xlclockdriver> generated.

Analyzing generic Entity <synth_reg_w_init.1> in library <work> (Architecture <structural>).
	init_index = 0
	init_value = "0000"
	latency = 1
	width = 1
Entity <synth_reg_w_init.1> analyzed. Unit <synth_reg_w_init.1> generated.

Analyzing generic Entity <single_reg_w_init.1> in library <work> (Architecture <structural>).
	init_index = 0
	init_value = "0000"
	width = 1
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <single_reg_w_init.1> analyzed. Unit <single_reg_w_init.1> generated.

Analyzing Entity <expres4g1024m> in library <work> (Architecture <structural>).
WARNING:Xst:752 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 12566: Unconnected input port 'c_in' of component 'xladdsub' is tied to default value.
WARNING:Xst:752 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 12566: Unconnected input port 'rst' of component 'xladdsub' is tied to default value.
WARNING:Xst:753 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 12566: Unconnected output port 'c_out' of component 'xladdsub'.
Entity <expres4g1024m> analyzed. Unit <expres4g1024m> generated.

Analyzing Entity <adc_entity_9852d04a8e> in library <work> (Architecture <structural>).
Entity <adc_entity_9852d04a8e> analyzed. Unit <adc_entity_9852d04a8e> generated.

Analyzing Entity <conv1_entity_99e0255406> in library <work> (Architecture <structural>).
Entity <conv1_entity_99e0255406> analyzed. Unit <conv1_entity_99e0255406> generated.

Analyzing Entity <concat_ddc54e5835> in library <work> (Architecture <behavior>).
Entity <concat_ddc54e5835> analyzed. Unit <concat_ddc54e5835> generated.

Analyzing Entity <inverter_b526fbe439> in library <work> (Architecture <behavior>).
Entity <inverter_b526fbe439> analyzed. Unit <inverter_b526fbe439> generated.

Analyzing Entity <reinterpret_d4aaa1bdfb> in library <work> (Architecture <behavior>).
Entity <reinterpret_d4aaa1bdfb> analyzed. Unit <reinterpret_d4aaa1bdfb> generated.

Analyzing Entity <slice_548b816da1> in library <work> (Architecture <behavior>).
Entity <slice_548b816da1> analyzed. Unit <slice_548b816da1> generated.

Analyzing Entity <slice1_ca2b52d742> in library <work> (Architecture <behavior>).
Entity <slice1_ca2b52d742> analyzed. Unit <slice1_ca2b52d742> generated.

Analyzing Entity <conv2_entity_8ea5768454> in library <work> (Architecture <structural>).
Entity <conv2_entity_8ea5768454> analyzed. Unit <conv2_entity_8ea5768454> generated.

Analyzing Entity <concat_c2ceb1b433> in library <work> (Architecture <behavior>).
Entity <concat_c2ceb1b433> analyzed. Unit <concat_c2ceb1b433> generated.

Analyzing Entity <inverter_2f02a7b0ae> in library <work> (Architecture <behavior>).
Entity <inverter_2f02a7b0ae> analyzed. Unit <inverter_2f02a7b0ae> generated.

Analyzing Entity <reinterpret_b4b31b4648> in library <work> (Architecture <behavior>).
Entity <reinterpret_b4b31b4648> analyzed. Unit <reinterpret_b4b31b4648> generated.

Analyzing Entity <slice_1145e8f1a6> in library <work> (Architecture <behavior>).
Entity <slice_1145e8f1a6> analyzed. Unit <slice_1145e8f1a6> generated.

Analyzing Entity <slice1_30272eab40> in library <work> (Architecture <behavior>).
Entity <slice1_30272eab40> analyzed. Unit <slice1_30272eab40> generated.

Analyzing Entity <conv3_entity_96c1e66e28> in library <work> (Architecture <structural>).
Entity <conv3_entity_96c1e66e28> analyzed. Unit <conv3_entity_96c1e66e28> generated.

Analyzing Entity <concat_f31155dc36> in library <work> (Architecture <behavior>).
Entity <concat_f31155dc36> analyzed. Unit <concat_f31155dc36> generated.

Analyzing Entity <inverter_deb105cfd5> in library <work> (Architecture <behavior>).
Entity <inverter_deb105cfd5> analyzed. Unit <inverter_deb105cfd5> generated.

Analyzing Entity <reinterpret_1953f27fdf> in library <work> (Architecture <behavior>).
Entity <reinterpret_1953f27fdf> analyzed. Unit <reinterpret_1953f27fdf> generated.

Analyzing Entity <slice_17b71bf882> in library <work> (Architecture <behavior>).
Entity <slice_17b71bf882> analyzed. Unit <slice_17b71bf882> generated.

Analyzing Entity <slice1_b8da15b44a> in library <work> (Architecture <behavior>).
Entity <slice1_b8da15b44a> analyzed. Unit <slice1_b8da15b44a> generated.

Analyzing Entity <conv4_entity_91fe140263> in library <work> (Architecture <structural>).
Entity <conv4_entity_91fe140263> analyzed. Unit <conv4_entity_91fe140263> generated.

Analyzing Entity <concat_8f2a4bed20> in library <work> (Architecture <behavior>).
Entity <concat_8f2a4bed20> analyzed. Unit <concat_8f2a4bed20> generated.

Analyzing Entity <inverter_f6278b222a> in library <work> (Architecture <behavior>).
Entity <inverter_f6278b222a> analyzed. Unit <inverter_f6278b222a> generated.

Analyzing Entity <reinterpret_28813488a0> in library <work> (Architecture <behavior>).
Entity <reinterpret_28813488a0> analyzed. Unit <reinterpret_28813488a0> generated.

Analyzing Entity <slice_4086228a71> in library <work> (Architecture <behavior>).
Entity <slice_4086228a71> analyzed. Unit <slice_4086228a71> generated.

Analyzing Entity <slice1_dc1027beb6> in library <work> (Architecture <behavior>).
Entity <slice1_dc1027beb6> analyzed. Unit <slice1_dc1027beb6> generated.

Analyzing Entity <conv5_entity_d456057b01> in library <work> (Architecture <structural>).
Entity <conv5_entity_d456057b01> analyzed. Unit <conv5_entity_d456057b01> generated.

Analyzing Entity <concat_c6213979ad> in library <work> (Architecture <behavior>).
Entity <concat_c6213979ad> analyzed. Unit <concat_c6213979ad> generated.

Analyzing Entity <inverter_14e3210e70> in library <work> (Architecture <behavior>).
Entity <inverter_14e3210e70> analyzed. Unit <inverter_14e3210e70> generated.

Analyzing Entity <reinterpret_c607a35a29> in library <work> (Architecture <behavior>).
Entity <reinterpret_c607a35a29> analyzed. Unit <reinterpret_c607a35a29> generated.

Analyzing Entity <slice_d1e6bddb3b> in library <work> (Architecture <behavior>).
Entity <slice_d1e6bddb3b> analyzed. Unit <slice_d1e6bddb3b> generated.

Analyzing Entity <slice1_c85fcf892b> in library <work> (Architecture <behavior>).
Entity <slice1_c85fcf892b> analyzed. Unit <slice1_c85fcf892b> generated.

Analyzing Entity <conv6_entity_98cfaee0c2> in library <work> (Architecture <structural>).
Entity <conv6_entity_98cfaee0c2> analyzed. Unit <conv6_entity_98cfaee0c2> generated.

Analyzing Entity <concat_abceb0e700> in library <work> (Architecture <behavior>).
Entity <concat_abceb0e700> analyzed. Unit <concat_abceb0e700> generated.

Analyzing Entity <inverter_1583af95f1> in library <work> (Architecture <behavior>).
Entity <inverter_1583af95f1> analyzed. Unit <inverter_1583af95f1> generated.

Analyzing Entity <reinterpret_7eef37775d> in library <work> (Architecture <behavior>).
Entity <reinterpret_7eef37775d> analyzed. Unit <reinterpret_7eef37775d> generated.

Analyzing Entity <slice_58a5b34657> in library <work> (Architecture <behavior>).
Entity <slice_58a5b34657> analyzed. Unit <slice_58a5b34657> generated.

Analyzing Entity <slice1_94a4a96ba5> in library <work> (Architecture <behavior>).
Entity <slice1_94a4a96ba5> analyzed. Unit <slice1_94a4a96ba5> generated.

Analyzing Entity <conv7_entity_c2e26db709> in library <work> (Architecture <structural>).
Entity <conv7_entity_c2e26db709> analyzed. Unit <conv7_entity_c2e26db709> generated.

Analyzing Entity <concat_c79d543ed9> in library <work> (Architecture <behavior>).
Entity <concat_c79d543ed9> analyzed. Unit <concat_c79d543ed9> generated.

Analyzing Entity <inverter_8ce249e4c9> in library <work> (Architecture <behavior>).
Entity <inverter_8ce249e4c9> analyzed. Unit <inverter_8ce249e4c9> generated.

Analyzing Entity <reinterpret_955f8abbef> in library <work> (Architecture <behavior>).
Entity <reinterpret_955f8abbef> analyzed. Unit <reinterpret_955f8abbef> generated.

Analyzing Entity <slice_510bfcefde> in library <work> (Architecture <behavior>).
Entity <slice_510bfcefde> analyzed. Unit <slice_510bfcefde> generated.

Analyzing Entity <slice1_a788d95eec> in library <work> (Architecture <behavior>).
Entity <slice1_a788d95eec> analyzed. Unit <slice1_a788d95eec> generated.

Analyzing Entity <conv_entity_f5df0b0e65> in library <work> (Architecture <structural>).
Entity <conv_entity_f5df0b0e65> analyzed. Unit <conv_entity_f5df0b0e65> generated.

Analyzing Entity <concat_bc5e36d4ea> in library <work> (Architecture <behavior>).
Entity <concat_bc5e36d4ea> analyzed. Unit <concat_bc5e36d4ea> generated.

Analyzing Entity <inverter_e88d30344f> in library <work> (Architecture <behavior>).
Entity <inverter_e88d30344f> analyzed. Unit <inverter_e88d30344f> generated.

Analyzing Entity <reinterpret_bb5704daa0> in library <work> (Architecture <behavior>).
Entity <reinterpret_bb5704daa0> analyzed. Unit <reinterpret_bb5704daa0> generated.

Analyzing Entity <slice_ada6dabeed> in library <work> (Architecture <behavior>).
Entity <slice_ada6dabeed> analyzed. Unit <slice_ada6dabeed> generated.

Analyzing Entity <slice1_024135aade> in library <work> (Architecture <behavior>).
Entity <slice1_024135aade> analyzed. Unit <slice1_024135aade> generated.

Analyzing Entity <adc_data_i_entity_a3a8938725> in library <work> (Architecture <structural>).
Entity <adc_data_i_entity_a3a8938725> analyzed. Unit <adc_data_i_entity_a3a8938725> generated.

Analyzing generic Entity <xlconvert.2> in library <work> (Architecture <behavior>).
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 32
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	latency = 0
	overflow = 1
	quantization = 1
Entity <xlconvert.2> analyzed. Unit <xlconvert.2> generated.

Analyzing generic Entity <convert_func_call.1> in library <work> (Architecture <behavior>).
	din_arith = 1
	din_bin_pt = 0
	din_width = 32
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	overflow = 1
	quantization = 1
Entity <convert_func_call.1> analyzed. Unit <convert_func_call.1> generated.

Analyzing Entity <adc_data_q_entity_64b50d7ffe> in library <work> (Architecture <structural>).
Entity <adc_data_q_entity_64b50d7ffe> analyzed. Unit <adc_data_q_entity_64b50d7ffe> generated.

Analyzing Entity <adccat1_entity_e02ada5f8a> in library <work> (Architecture <structural>).
Entity <adccat1_entity_e02ada5f8a> analyzed. Unit <adccat1_entity_e02ada5f8a> generated.

Analyzing Entity <concat1_91f6e5894e> in library <work> (Architecture <behavior>).
Entity <concat1_91f6e5894e> analyzed. Unit <concat1_91f6e5894e> generated.

Analyzing Entity <reinterpret1_421868fdcf> in library <work> (Architecture <behavior>).
Entity <reinterpret1_421868fdcf> analyzed. Unit <reinterpret1_421868fdcf> generated.

Analyzing Entity <reinterpret2_af838af55d> in library <work> (Architecture <behavior>).
Entity <reinterpret2_af838af55d> analyzed. Unit <reinterpret2_af838af55d> generated.

Analyzing Entity <reinterpret3_8118b8df3f> in library <work> (Architecture <behavior>).
Entity <reinterpret3_8118b8df3f> analyzed. Unit <reinterpret3_8118b8df3f> generated.

Analyzing Entity <reinterpret4_b77a7b0ce0> in library <work> (Architecture <behavior>).
Entity <reinterpret4_b77a7b0ce0> analyzed. Unit <reinterpret4_b77a7b0ce0> generated.

Analyzing Entity <adccat2_entity_ceac40d612> in library <work> (Architecture <structural>).
Entity <adccat2_entity_ceac40d612> analyzed. Unit <adccat2_entity_ceac40d612> generated.

Analyzing Entity <concat1_8254fe26d1> in library <work> (Architecture <behavior>).
Entity <concat1_8254fe26d1> analyzed. Unit <concat1_8254fe26d1> generated.

Analyzing Entity <reinterpret1_209a7f1ccf> in library <work> (Architecture <behavior>).
Entity <reinterpret1_209a7f1ccf> analyzed. Unit <reinterpret1_209a7f1ccf> generated.

Analyzing Entity <reinterpret2_f735414ec3> in library <work> (Architecture <behavior>).
Entity <reinterpret2_f735414ec3> analyzed. Unit <reinterpret2_f735414ec3> generated.

Analyzing Entity <reinterpret3_f487f886c1> in library <work> (Architecture <behavior>).
Entity <reinterpret3_f487f886c1> analyzed. Unit <reinterpret3_f487f886c1> generated.

Analyzing Entity <reinterpret4_5b4e0dc295> in library <work> (Architecture <behavior>).
Entity <reinterpret4_5b4e0dc295> analyzed. Unit <reinterpret4_5b4e0dc295> generated.

Analyzing Entity <adcuncat1_entity_eb19c49dca> in library <work> (Architecture <structural>).
Entity <adcuncat1_entity_eb19c49dca> analyzed. Unit <adcuncat1_entity_eb19c49dca> generated.

Analyzing Entity <bit0_eab550d1c0> in library <work> (Architecture <behavior>).
Entity <bit0_eab550d1c0> analyzed. Unit <bit0_eab550d1c0> generated.

Analyzing Entity <bit16_f5ebc38801> in library <work> (Architecture <behavior>).
Entity <bit16_f5ebc38801> analyzed. Unit <bit16_f5ebc38801> generated.

Analyzing Entity <bit24_c653e87f15> in library <work> (Architecture <behavior>).
Entity <bit24_c653e87f15> analyzed. Unit <bit24_c653e87f15> generated.

Analyzing Entity <bit8_6a4da2d14b> in library <work> (Architecture <behavior>).
Entity <bit8_6a4da2d14b> analyzed. Unit <bit8_6a4da2d14b> generated.

Analyzing Entity <reinterpret4_2cede6fcef> in library <work> (Architecture <behavior>).
Entity <reinterpret4_2cede6fcef> analyzed. Unit <reinterpret4_2cede6fcef> generated.

Analyzing Entity <reinterpret5_ddc5355546> in library <work> (Architecture <behavior>).
Entity <reinterpret5_ddc5355546> analyzed. Unit <reinterpret5_ddc5355546> generated.

Analyzing Entity <reinterpret6_0562bbbdfa> in library <work> (Architecture <behavior>).
Entity <reinterpret6_0562bbbdfa> analyzed. Unit <reinterpret6_0562bbbdfa> generated.

Analyzing Entity <reinterpret7_28693a4e8c> in library <work> (Architecture <behavior>).
Entity <reinterpret7_28693a4e8c> analyzed. Unit <reinterpret7_28693a4e8c> generated.

Analyzing Entity <adcuncat2_entity_4514881654> in library <work> (Architecture <structural>).
Entity <adcuncat2_entity_4514881654> analyzed. Unit <adcuncat2_entity_4514881654> generated.

Analyzing Entity <bit0_5b70faa9e1> in library <work> (Architecture <behavior>).
Entity <bit0_5b70faa9e1> analyzed. Unit <bit0_5b70faa9e1> generated.

Analyzing Entity <bit16_0899a8c2cd> in library <work> (Architecture <behavior>).
Entity <bit16_0899a8c2cd> analyzed. Unit <bit16_0899a8c2cd> generated.

Analyzing Entity <bit24_6703f73bb4> in library <work> (Architecture <behavior>).
Entity <bit24_6703f73bb4> analyzed. Unit <bit24_6703f73bb4> generated.

Analyzing Entity <bit8_a5f685fcb4> in library <work> (Architecture <behavior>).
Entity <bit8_a5f685fcb4> analyzed. Unit <bit8_a5f685fcb4> generated.

Analyzing Entity <reinterpret4_0bfe5a8dd8> in library <work> (Architecture <behavior>).
Entity <reinterpret4_0bfe5a8dd8> analyzed. Unit <reinterpret4_0bfe5a8dd8> generated.

Analyzing Entity <reinterpret5_ad5fcc0cc6> in library <work> (Architecture <behavior>).
Entity <reinterpret5_ad5fcc0cc6> analyzed. Unit <reinterpret5_ad5fcc0cc6> generated.

Analyzing Entity <reinterpret6_0f88bc95f6> in library <work> (Architecture <behavior>).
Entity <reinterpret6_0f88bc95f6> analyzed. Unit <reinterpret6_0f88bc95f6> generated.

Analyzing Entity <reinterpret7_1f25723006> in library <work> (Architecture <behavior>).
Entity <reinterpret7_1f25723006> analyzed. Unit <reinterpret7_1f25723006> generated.

Analyzing generic Entity <xladdsub> in library <work> (Architecture <behavior>).
	a_arith = 1
	a_bin_pt = 0
	a_width = 32
	b_arith = 1
	b_bin_pt = 0
	b_width = 32
	c_has_b_out = 0
	c_has_c_out = 0
	c_has_ovfl = 0
	c_has_q = 1
	c_has_q_b_out = 0
	c_has_q_c_out = 0
	c_has_q_ovfl = 0
	c_has_s = 0
	c_in_arith = 1
	c_in_bin_pt = 4
	c_in_width = 16
	c_latency = 1
	c_out_arith = 1
	c_out_bin_pt = 4
	c_out_width = 16
	c_output_width = 33
	core_name0 = "adder_subtracter_virtex2p_7_0_23d84c584623d65e"
	en_arith = 1
	en_bin_pt = 0
	en_width = 1
	extra_registers = 0
	full_s_arith = 1
	full_s_width = 33
	latency = 1
	mode = 1
	overflow = 1
	quantization = 1
	rst_arith = 1
	rst_bin_pt = 0
	rst_width = 1
	s_arith = 1
	s_bin_pt = 0
	s_width = 33
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
    Set property "syn_black_box = TRUE" for instance <comp0.core_instance0> in unit <xladdsub>.
Entity <xladdsub> analyzed. Unit <xladdsub> generated.

Analyzing Entity <assemblestatus_entity_7fd680fdc6> in library <work> (Architecture <structural>).
Entity <assemblestatus_entity_7fd680fdc6> analyzed. Unit <assemblestatus_entity_7fd680fdc6> generated.

Analyzing Entity <concat_d694665e71> in library <work> (Architecture <behavior>).
Entity <concat_d694665e71> analyzed. Unit <concat_d694665e71> generated.

Analyzing Entity <concat1_3055210e70> in library <work> (Architecture <behavior>).
Entity <concat1_3055210e70> analyzed. Unit <concat1_3055210e70> generated.

Analyzing Entity <concat2_7c7ec05f81> in library <work> (Architecture <behavior>).
Entity <concat2_7c7ec05f81> analyzed. Unit <concat2_7c7ec05f81> generated.

Analyzing Entity <concat3_c4dc34b1a7> in library <work> (Architecture <behavior>).
Entity <concat3_c4dc34b1a7> analyzed. Unit <concat3_c4dc34b1a7> generated.

Analyzing Entity <constant1_699d7f1eeb> in library <work> (Architecture <behavior>).
Entity <constant1_699d7f1eeb> analyzed. Unit <constant1_699d7f1eeb> generated.

Analyzing Entity <constant2_5f1cd7b048> in library <work> (Architecture <behavior>).
Entity <constant2_5f1cd7b048> analyzed. Unit <constant2_5f1cd7b048> generated.

Analyzing Entity <constant3_d786e11d4e> in library <work> (Architecture <behavior>).
Entity <constant3_d786e11d4e> analyzed. Unit <constant3_d786e11d4e> generated.

Analyzing Entity <constant4_21438855e4> in library <work> (Architecture <behavior>).
Entity <constant4_21438855e4> analyzed. Unit <constant4_21438855e4> generated.

Analyzing Entity <constant5_075adb46bf> in library <work> (Architecture <behavior>).
Entity <constant5_075adb46bf> analyzed. Unit <constant5_075adb46bf> generated.

Analyzing Entity <constant6_49c14364ee> in library <work> (Architecture <behavior>).
Entity <constant6_49c14364ee> analyzed. Unit <constant6_49c14364ee> generated.

Analyzing Entity <bitreducer8to2_v10> in library <work> (Architecture <Behavioral>).
Entity <bitreducer8to2_v10> analyzed. Unit <bitreducer8to2_v10> generated.

Analyzing Entity <bl_byte0_85614cf66d> in library <work> (Architecture <behavior>).
Entity <bl_byte0_85614cf66d> analyzed. Unit <bl_byte0_85614cf66d> generated.

Analyzing Entity <bl_byte1_4dee1560eb> in library <work> (Architecture <behavior>).
Entity <bl_byte1_4dee1560eb> analyzed. Unit <bl_byte1_4dee1560eb> generated.

Analyzing Entity <bl_byte2_87e71d2c59> in library <work> (Architecture <behavior>).
Entity <bl_byte2_87e71d2c59> analyzed. Unit <bl_byte2_87e71d2c59> generated.

Analyzing Entity <bl_byte3_62ea3ff720> in library <work> (Architecture <behavior>).
Entity <bl_byte3_62ea3ff720> analyzed. Unit <bl_byte3_62ea3ff720> generated.

Analyzing Entity <configsys_entity_72b77062d8> in library <work> (Architecture <structural>).
Entity <configsys_entity_72b77062d8> analyzed. Unit <configsys_entity_72b77062d8> generated.

Analyzing Entity <concat_df7186a2e1> in library <work> (Architecture <behavior>).
Entity <concat_df7186a2e1> analyzed. Unit <concat_df7186a2e1> generated.

Analyzing Entity <constant8_cb133a1117> in library <work> (Architecture <behavior>).
Entity <constant8_cb133a1117> analyzed. Unit <constant8_cb133a1117> generated.

Analyzing Entity <lsb1_e6a95c1af1> in library <work> (Architecture <behavior>).
Entity <lsb1_e6a95c1af1> analyzed. Unit <lsb1_e6a95c1af1> generated.

Analyzing Entity <lsb3_b3a1c0e2cd> in library <work> (Architecture <behavior>).
Entity <lsb3_b3a1c0e2cd> analyzed. Unit <lsb3_b3a1c0e2cd> generated.

Analyzing generic Entity <xlpassthrough.1> in library <work> (Architecture <passthrough_arch>).
	din_width = 1
	dout_width = 1
Entity <xlpassthrough.1> analyzed. Unit <xlpassthrough.1> generated.

Analyzing generic Entity <xlpassthrough.2> in library <work> (Architecture <passthrough_arch>).
	din_width = 16
	dout_width = 16
Entity <xlpassthrough.2> analyzed. Unit <xlpassthrough.2> generated.

Analyzing generic Entity <xlpassthrough.3> in library <work> (Architecture <passthrough_arch>).
	din_width = 5
	dout_width = 5
Entity <xlpassthrough.3> analyzed. Unit <xlpassthrough.3> generated.

Analyzing Entity <sl_5lsb_82c15f848e> in library <work> (Architecture <behavior>).
Entity <sl_5lsb_82c15f848e> analyzed. Unit <sl_5lsb_82c15f848e> generated.

Analyzing Entity <sl_5lsb_1_85931bdd03> in library <work> (Architecture <behavior>).
Entity <sl_5lsb_1_85931bdd03> analyzed. Unit <sl_5lsb_1_85931bdd03> generated.

Analyzing Entity <sl_byte0_4d9050d309> in library <work> (Architecture <behavior>).
Entity <sl_byte0_4d9050d309> analyzed. Unit <sl_byte0_4d9050d309> generated.

Analyzing Entity <sl_byte1_21a54b9e61> in library <work> (Architecture <behavior>).
Entity <sl_byte1_21a54b9e61> analyzed. Unit <sl_byte1_21a54b9e61> generated.

Analyzing Entity <sl_byte2_3628a88f76> in library <work> (Architecture <behavior>).
Entity <sl_byte2_3628a88f76> analyzed. Unit <sl_byte2_3628a88f76> generated.

Analyzing Entity <sl_byte3_9d1210cfbd> in library <work> (Architecture <behavior>).
Entity <sl_byte3_9d1210cfbd> analyzed. Unit <sl_byte3_9d1210cfbd> generated.

Analyzing Entity <constant1_2ba2b4f03c> in library <work> (Architecture <behavior>).
Entity <constant1_2ba2b4f03c> analyzed. Unit <constant1_2ba2b4f03c> generated.

Analyzing Entity <constant2_a7a5800303> in library <work> (Architecture <behavior>).
Entity <constant2_a7a5800303> analyzed. Unit <constant2_a7a5800303> generated.

Analyzing Entity <constant3_2994ece7ca> in library <work> (Architecture <behavior>).
Entity <constant3_2994ece7ca> analyzed. Unit <constant3_2994ece7ca> generated.

Analyzing Entity <constant4_ad9ae8727a> in library <work> (Architecture <behavior>).
Entity <constant4_ad9ae8727a> analyzed. Unit <constant4_ad9ae8727a> generated.

Analyzing Entity <constant5_f77e6e4b80> in library <work> (Architecture <behavior>).
Entity <constant5_f77e6e4b80> analyzed. Unit <constant5_f77e6e4b80> generated.

Analyzing Entity <constant6_4c5259419a> in library <work> (Architecture <behavior>).
Entity <constant6_4c5259419a> analyzed. Unit <constant6_4c5259419a> generated.

Analyzing Entity <constant7_5a759dc8e0> in library <work> (Architecture <behavior>).
Entity <constant7_5a759dc8e0> analyzed. Unit <constant7_5a759dc8e0> generated.

Analyzing Entity <constant8_738ac8f738> in library <work> (Architecture <behavior>).
Entity <constant8_738ac8f738> analyzed. Unit <constant8_738ac8f738> generated.

Analyzing Entity <constant9_7040000009> in library <work> (Architecture <behavior>).
Entity <constant9_7040000009> analyzed. Unit <constant9_7040000009> generated.

Analyzing generic Entity <xlconvert.1> in library <work> (Architecture <behavior>).
	bool_conversion = 1
	din_arith = 1
	din_bin_pt = 0
	din_width = 1
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 1
	latency = 0
	overflow = 1
	quantization = 1
Entity <xlconvert.1> analyzed. Unit <xlconvert.1> generated.

Analyzing generic Entity <xldelay.1> in library <work> (Architecture <behavior>).
	latency = 16
	reg_retiming = 0
	width = 64
Entity <xldelay.1> analyzed. Unit <xldelay.1> generated.

Analyzing generic Entity <synth_reg.1> in library <work> (Architecture <structural>).
	latency = 16
	width = 64
Entity <synth_reg.1> analyzed. Unit <synth_reg.1> generated.

Analyzing generic Entity <srl17e.1> in library <work> (Architecture <structural>).
	latency = 16
	width = 64
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <srl17e.1> analyzed. Unit <srl17e.1> generated.

Analyzing generic Entity <xldelay.2> in library <work> (Architecture <behavior>).
	latency = 16
	reg_retiming = 0
	width = 1
Entity <xldelay.2> analyzed. Unit <xldelay.2> generated.

Analyzing generic Entity <synth_reg.2> in library <work> (Architecture <structural>).
	latency = 16
	width = 1
Entity <synth_reg.2> analyzed. Unit <synth_reg.2> generated.

Analyzing generic Entity <srl17e.2> in library <work> (Architecture <structural>).
	latency = 16
	width = 1
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <srl17e.2> analyzed. Unit <srl17e.2> generated.

Analyzing generic Entity <xldelay.3> in library <work> (Architecture <behavior>).
	latency = 4
	reg_retiming = 0
	width = 32
Entity <xldelay.3> analyzed. Unit <xldelay.3> generated.

Analyzing generic Entity <synth_reg.3> in library <work> (Architecture <structural>).
	latency = 4
	width = 32
Entity <synth_reg.3> analyzed. Unit <synth_reg.3> generated.

Analyzing generic Entity <srl17e.3> in library <work> (Architecture <structural>).
	latency = 4
	width = 32
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <srl17e.3> analyzed. Unit <srl17e.3> generated.

Analyzing generic Entity <xldelay.4> in library <work> (Architecture <behavior>).
	latency = 4
	reg_retiming = 0
	width = 1
Entity <xldelay.4> analyzed. Unit <xldelay.4> generated.

Analyzing generic Entity <synth_reg.4> in library <work> (Architecture <structural>).
	latency = 4
	width = 1
Entity <synth_reg.4> analyzed. Unit <synth_reg.4> generated.

Analyzing generic Entity <srl17e.4> in library <work> (Architecture <structural>).
	latency = 4
	width = 1
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <srl17e.4> analyzed. Unit <srl17e.4> generated.

Analyzing generic Entity <xldelay.5> in library <work> (Architecture <behavior>).
	latency = 16
	reg_retiming = 0
	width = 32
Entity <xldelay.5> analyzed. Unit <xldelay.5> generated.

Analyzing generic Entity <synth_reg.5> in library <work> (Architecture <structural>).
	latency = 16
	width = 32
Entity <synth_reg.5> analyzed. Unit <synth_reg.5> generated.

Analyzing generic Entity <srl17e.5> in library <work> (Architecture <structural>).
	latency = 16
	width = 32
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <srl17e.5> analyzed. Unit <srl17e.5> generated.

Analyzing generic Entity <xldelay.6> in library <work> (Architecture <behavior>).
	latency = 16
	reg_retiming = 0
	width = 33
Entity <xldelay.6> analyzed. Unit <xldelay.6> generated.

Analyzing generic Entity <synth_reg.6> in library <work> (Architecture <structural>).
	latency = 16
	width = 33
Entity <synth_reg.6> analyzed. Unit <synth_reg.6> generated.

Analyzing generic Entity <srl17e.6> in library <work> (Architecture <structural>).
	latency = 16
	width = 33
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <srl17e.6> analyzed. Unit <srl17e.6> generated.

Analyzing generic Entity <xldelay.7> in library <work> (Architecture <behavior>).
	latency = 4
	reg_retiming = 0
	width = 92
Entity <xldelay.7> analyzed. Unit <xldelay.7> generated.

Analyzing generic Entity <synth_reg.7> in library <work> (Architecture <structural>).
	latency = 4
	width = 92
Entity <synth_reg.7> analyzed. Unit <synth_reg.7> generated.

Analyzing generic Entity <srl17e.7> in library <work> (Architecture <structural>).
	latency = 4
	width = 92
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1710: Instantiating black box module <SRL16E>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1723: Instantiating black box module <FDE>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <srl17e.7> analyzed. Unit <srl17e.7> generated.

Analyzing Entity <led0_entity_adcb04e180> in library <work> (Architecture <structural>).
Entity <led0_entity_adcb04e180> analyzed. Unit <led0_entity_adcb04e180> generated.

Analyzing Entity <led1_entity_6df427b2a9> in library <work> (Architecture <structural>).
Entity <led1_entity_6df427b2a9> analyzed. Unit <led1_entity_6df427b2a9> generated.

Analyzing Entity <led2_entity_a89ed2d92f> in library <work> (Architecture <structural>).
Entity <led2_entity_a89ed2d92f> analyzed. Unit <led2_entity_a89ed2d92f> generated.

Analyzing Entity <led3_entity_de4918e802> in library <work> (Architecture <structural>).
Entity <led3_entity_de4918e802> analyzed. Unit <led3_entity_de4918e802> generated.

Analyzing Entity <led6_entity_89f383e74d> in library <work> (Architecture <structural>).
Entity <led6_entity_89f383e74d> analyzed. Unit <led6_entity_89f383e74d> generated.

Analyzing Entity <led7_entity_fc9cf74af9> in library <work> (Architecture <structural>).
Entity <led7_entity_fc9cf74af9> analyzed. Unit <led7_entity_fc9cf74af9> generated.

Analyzing Entity <logical_093b0449cf> in library <work> (Architecture <behavior>).
Entity <logical_093b0449cf> analyzed. Unit <logical_093b0449cf> generated.

Analyzing Entity <lsb1_618afcaae2> in library <work> (Architecture <behavior>).
Entity <lsb1_618afcaae2> analyzed. Unit <lsb1_618afcaae2> generated.

Analyzing Entity <posedge_entity_aac04e502a> in library <work> (Architecture <structural>).
Entity <posedge_entity_aac04e502a> analyzed. Unit <posedge_entity_aac04e502a> generated.

Analyzing Entity <inverter2_2ab0852d89> in library <work> (Architecture <behavior>).
Entity <inverter2_2ab0852d89> analyzed. Unit <inverter2_2ab0852d89> generated.

Analyzing Entity <logical1_dc01bcb7e5> in library <work> (Architecture <behavior>).
Entity <logical1_dc01bcb7e5> analyzed. Unit <logical1_dc01bcb7e5> generated.

Analyzing generic Entity <xlregister> in library <work> (Architecture <behavior>).
	d_width = 64
	init_value = "0000000000000000000000000000000000000000000000000000000000000000"
Entity <xlregister> analyzed. Unit <xlregister> generated.

Analyzing generic Entity <synth_reg_w_init.2> in library <work> (Architecture <structural>).
	init_index = 2
	init_value = "0000000000000000000000000000000000000000000000000000000000000000"
	latency = 1
	width = 64
Entity <synth_reg_w_init.2> analyzed. Unit <synth_reg_w_init.2> generated.

Analyzing generic Entity <single_reg_w_init.2> in library <work> (Architecture <structural>).
	init_index = 2
	init_value = "0000000000000000000000000000000000000000000000000000000000000000"
	width = 64
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
WARNING:Xst:2211 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 1943: Instantiating black box module <fdre>.
WARNING:Xst:37 - Unknown property "fpga_dont_touch".
Entity <single_reg_w_init.2> analyzed. Unit <single_reg_w_init.2> generated.

Analyzing generic Entity <rtc32_v14> in library <work> (Architecture <Behavioral>).
	SYS_FREQ_HZ = 256000000
Entity <rtc32_v14> analyzed. Unit <rtc32_v14> generated.

Analyzing Entity <rtc_time_entity_e8033653dc> in library <work> (Architecture <structural>).
Entity <rtc_time_entity_e8033653dc> analyzed. Unit <rtc_time_entity_e8033653dc> generated.

Analyzing Entity <sl_10lsb_4817575a2c> in library <work> (Architecture <behavior>).
Entity <sl_10lsb_4817575a2c> analyzed. Unit <sl_10lsb_4817575a2c> generated.

Analyzing Entity <sl_10lsb1_e3e25df95e> in library <work> (Architecture <behavior>).
Entity <sl_10lsb1_e3e25df95e> analyzed. Unit <sl_10lsb1_e3e25df95e> generated.

Analyzing Entity <status_entity_c438123aa7> in library <work> (Architecture <structural>).
Entity <status_entity_c438123aa7> analyzed. Unit <status_entity_c438123aa7> generated.

Analyzing generic Entity <xlconvert.3> in library <work> (Architecture <behavior>).
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 92
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	latency = 0
	overflow = 1
	quantization = 1
Entity <xlconvert.3> analyzed. Unit <xlconvert.3> generated.

Analyzing generic Entity <convert_func_call.2> in library <work> (Architecture <behavior>).
	din_arith = 1
	din_bin_pt = 0
	din_width = 92
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	overflow = 1
	quantization = 1
Entity <convert_func_call.2> analyzed. Unit <convert_func_call.2> generated.

Analyzing Entity <ten_gbe1_entity_b0a1ef16c5> in library <work> (Architecture <structural>).
Entity <ten_gbe1_entity_b0a1ef16c5> analyzed. Unit <ten_gbe1_entity_b0a1ef16c5> generated.

Analyzing generic Entity <xlconvert.4> in library <work> (Architecture <behavior>).
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 64
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 64
	latency = 0
	overflow = 1
	quantization = 1
Entity <xlconvert.4> analyzed. Unit <xlconvert.4> generated.

Analyzing generic Entity <convert_func_call.3> in library <work> (Architecture <behavior>).
	din_arith = 1
	din_bin_pt = 0
	din_width = 64
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 64
	overflow = 1
	quantization = 1
Entity <convert_func_call.3> analyzed. Unit <convert_func_call.3> generated.

Analyzing generic Entity <xlconvert.5> in library <work> (Architecture <behavior>).
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 33
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 16
	latency = 0
	overflow = 1
	quantization = 1
Entity <xlconvert.5> analyzed. Unit <xlconvert.5> generated.

Analyzing generic Entity <convert_func_call.4> in library <work> (Architecture <behavior>).
	din_arith = 1
	din_bin_pt = 0
	din_width = 33
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 16
	overflow = 1
	quantization = 1
Entity <convert_func_call.4> analyzed. Unit <convert_func_call.4> generated.

Analyzing Entity <ten_gbe2_entity_ddd9f696b9> in library <work> (Architecture <structural>).
Entity <ten_gbe2_entity_ddd9f696b9> analyzed. Unit <ten_gbe2_entity_ddd9f696b9> generated.

Analyzing generic Entity <xlconvert.6> in library <work> (Architecture <behavior>).
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 32
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 16
	latency = 0
	overflow = 1
	quantization = 1
Entity <xlconvert.6> analyzed. Unit <xlconvert.6> generated.

Analyzing generic Entity <convert_func_call.5> in library <work> (Architecture <behavior>).
	din_arith = 1
	din_bin_pt = 0
	din_width = 32
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 16
	overflow = 1
	quantization = 1
Entity <convert_func_call.5> analyzed. Unit <convert_func_call.5> generated.

Analyzing Entity <twobit_data_i_entity_0b92d44297> in library <work> (Architecture <structural>).
Entity <twobit_data_i_entity_0b92d44297> analyzed. Unit <twobit_data_i_entity_0b92d44297> generated.

Analyzing generic Entity <xlconvert.7> in library <work> (Architecture <behavior>).
	bool_conversion = 0
	din_arith = 1
	din_bin_pt = 0
	din_width = 64
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	latency = 0
	overflow = 1
	quantization = 1
Entity <xlconvert.7> analyzed. Unit <xlconvert.7> generated.

Analyzing generic Entity <convert_func_call.6> in library <work> (Architecture <behavior>).
	din_arith = 1
	din_bin_pt = 0
	din_width = 64
	dout_arith = 1
	dout_bin_pt = 0
	dout_width = 32
	overflow = 1
	quantization = 1
Entity <convert_func_call.6> analyzed. Unit <convert_func_call.6> generated.

Analyzing Entity <twobit_data_q_entity_b7296da730> in library <work> (Architecture <structural>).
Entity <twobit_data_q_entity_b7296da730> analyzed. Unit <twobit_data_q_entity_b7296da730> generated.

Analyzing generic Entity <vdif_packetizer_v15> in library <work> (Architecture <Behavioral>).
	frameCountLimit = 67108864
	frameLenLimit = 4096
WARNING:Xst:753 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 9356: Unconnected output port 'full' of component 'simpleFIFO'.
WARNING:Xst:753 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 9356: Unconnected output port 'debug' of component 'simpleFIFO'.
WARNING:Xst:819 - "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd" line 9469: The following signals are missing in the process sensitivity list:
   epseconds.
Entity <vdif_packetizer_v15> analyzed. Unit <vdif_packetizer_v15> generated.

Analyzing generic Entity <simpleFIFO> in library <work> (Architecture <behavioral>).
	depth = 10
	width = 64
Entity <simpleFIFO> analyzed. Unit <simpleFIFO> generated.


=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Performing bidirectional port resolution...
INFO:Xst:2679 - Register <op_mem_22_20(0)> in unit <inverter_b526fbe439> has a constant value of X during circuit operation. The register is replaced by logic.
INFO:Xst:2679 - Register <op_mem_22_20(0)> in unit <inverter_2f02a7b0ae> has a constant value of X during circuit operation. The register is replaced by logic.
INFO:Xst:2679 - Register <op_mem_22_20(0)> in unit <inverter_deb105cfd5> has a constant value of X during circuit operation. The register is replaced by logic.
INFO:Xst:2679 - Register <op_mem_22_20(0)> in unit <inverter_f6278b222a> has a constant value of X during circuit operation. The register is replaced by logic.
INFO:Xst:2679 - Register <op_mem_22_20(0)> in unit <inverter_14e3210e70> has a constant value of X during circuit operation. The register is replaced by logic.
INFO:Xst:2679 - Register <op_mem_22_20(0)> in unit <inverter_1583af95f1> has a constant value of X during circuit operation. The register is replaced by logic.
INFO:Xst:2679 - Register <op_mem_22_20(0)> in unit <inverter_8ce249e4c9> has a constant value of X during circuit operation. The register is replaced by logic.
INFO:Xst:2679 - Register <op_mem_22_20(0)> in unit <inverter_e88d30344f> has a constant value of X during circuit operation. The register is replaced by logic.

Synthesizing Unit <xlclkprobe>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m_cw.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <xlclkprobe> synthesized.


Synthesizing Unit <bitreducer8to2_v10>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <ce> is never used.
    Found 3-bit up counter for signal <bytes_added_v>.
    Found 8-bit register for signal <magnitude_level_neg_1>.
    Found 8-bit register for signal <magnitude_level_pos_1>.
    Found 64-bit register for signal <output_l>.
    Found 1-bit register for signal <output_sync_l>.
    Found 8-bit register for signal <output_syncs_l>.
    Found 1-bit register for signal <output_valid_l>.
    Found 1-bit register for signal <s0_mag>.
    Found 8-bit comparator greatequal for signal <s0_mag$cmp_ge0000> created at line 8276.
    Found 8-bit comparator lessequal for signal <s0_mag$cmp_le0000> created at line 8276.
    Found 1-bit register for signal <s0_sign>.
    Found 1-bit register for signal <s1_mag>.
    Found 8-bit comparator greatequal for signal <s1_mag$cmp_ge0000> created at line 8281.
    Found 8-bit comparator lessequal for signal <s1_mag$cmp_le0000> created at line 8281.
    Found 1-bit register for signal <s1_sign>.
    Found 1-bit register for signal <s2_mag>.
    Found 8-bit comparator greatequal for signal <s2_mag$cmp_ge0000> created at line 8286.
    Found 8-bit comparator lessequal for signal <s2_mag$cmp_le0000> created at line 8286.
    Found 1-bit register for signal <s2_sign>.
    Found 1-bit register for signal <s3_mag>.
    Found 8-bit comparator greatequal for signal <s3_mag$cmp_ge0000> created at line 8291.
    Found 8-bit comparator lessequal for signal <s3_mag$cmp_le0000> created at line 8291.
    Found 1-bit register for signal <s3_sign>.
    Found 64-bit register for signal <shifter>.
    Found 8-bit register for signal <shifter_syncs>.
    Found 1-bit register for signal <shifter_valid>.
    Found 1-bit register for signal <signal_ready_v>.
    Found 1-bit register for signal <sm_sync>.
    Found 1-bit register for signal <sm_valid>.
    Summary:
	inferred   1 Counter(s).
	inferred 174 D-type flip-flop(s).
	inferred   8 Comparator(s).
Unit <bitreducer8to2_v10> synthesized.


Synthesizing Unit <bl_byte0_85614cf66d>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:8>> is assigned but never used.
Unit <bl_byte0_85614cf66d> synthesized.


Synthesizing Unit <bl_byte1_4dee1560eb>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:16>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<7:0>> is assigned but never used.
Unit <bl_byte1_4dee1560eb> synthesized.


Synthesizing Unit <bl_byte2_87e71d2c59>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:24>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<15:0>> is assigned but never used.
Unit <bl_byte2_87e71d2c59> synthesized.


Synthesizing Unit <bl_byte3_62ea3ff720>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<23:0>> is assigned but never used.
Unit <bl_byte3_62ea3ff720> synthesized.


Synthesizing Unit <constant1_2ba2b4f03c>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant1_2ba2b4f03c> synthesized.


Synthesizing Unit <constant2_a7a5800303>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant2_a7a5800303> synthesized.


Synthesizing Unit <constant3_2994ece7ca>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant3_2994ece7ca> synthesized.


Synthesizing Unit <constant4_ad9ae8727a>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant4_ad9ae8727a> synthesized.


Synthesizing Unit <constant5_f77e6e4b80>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant5_f77e6e4b80> synthesized.


Synthesizing Unit <constant6_4c5259419a>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant6_4c5259419a> synthesized.


Synthesizing Unit <constant7_5a759dc8e0>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant7_5a759dc8e0> synthesized.


Synthesizing Unit <constant8_738ac8f738>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant8_738ac8f738> synthesized.


Synthesizing Unit <constant9_7040000009>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant9_7040000009> synthesized.


Synthesizing Unit <xlconvert_1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <xlconvert_1> synthesized.


Synthesizing Unit <logical_093b0449cf>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
    Found 1-bit register for signal <latency_pipe_5_26<0>>.
    Summary:
	inferred   1 D-type flip-flop(s).
Unit <logical_093b0449cf> synthesized.


Synthesizing Unit <lsb1_618afcaae2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:30>> is assigned but never used.
Unit <lsb1_618afcaae2> synthesized.


Synthesizing Unit <rtc32_v14>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:1780 - Signal <prev_rtc_step> is never used or assigned.
WARNING:Xst:1780 - Signal <prev_one_pps> is never used or assigned.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
    Found 1-bit register for signal <no_pps>.
    Found 32-bit register for signal <seconds>.
    Found 1-bit register for signal <pps_toggle>.
    Found 1-bit register for signal <triggered>.
    Found 1-bit register for signal <before_end<0>>.
    Found 32-bit comparator lessequal for signal <before_end_0$cmp_le0000> created at line 8883.
    Found 1-bit register for signal <before_end_1<0>>.
    Found 32-bit register for signal <extseconds>.
    Found 32-bit adder for signal <extseconds$addsub0000> created at line 8907.
    Found 32-bit 4-to-1 multiplexer for signal <extseconds$mux0001>.
    Found 32-bit register for signal <intseconds>.
    Found 32-bit adder for signal <intseconds$addsub0000> created at line 8941.
    Found 32-bit 4-to-1 multiplexer for signal <intseconds$mux0001>.
    Found 32-bit register for signal <longtickcount_1>.
    Found 1-bit register for signal <longtickcount_rollover_v<0>>.
    Found 32-bit up counter for signal <longtickcount_v>.
    Found 4-bit up counter for signal <missed_pps_count_v>.
    Found 1-bit register for signal <one_pps_1>.
    Found 32-bit register for signal <outseconds>.
    Found 1-bit register for signal <passed_start<0>>.
    Found 32-bit comparator greatequal for signal <passed_start_0$cmp_ge0000> created at line 8882.
    Found 1-bit register for signal <passed_start_1<0>>.
    Found 1-bit register for signal <pps_fault<0>>.
    Found 1-bit register for signal <reload_done_ext<0>>.
    Found 1-bit register for signal <reload_done_int<0>>.
    Found 1-bit register for signal <reload_pending<0>>.
    Found 1-bit register for signal <systick_1>.
    Found 32-bit register for signal <tickcount_1>.
    Found 1-bit register for signal <tickcount_rollover_v<0>>.
    Found 32-bit up counter for signal <tickcount_v>.
    Found 32-bit register for signal <time_set_1>.
    Found 32-bit register for signal <time_trigstart_1>.
    Found 32-bit register for signal <time_trigstop_1>.
    Summary:
	inferred   3 Counter(s).
	inferred 303 D-type flip-flop(s).
	inferred   2 Adder/Subtractor(s).
	inferred   2 Comparator(s).
	inferred  64 Multiplexer(s).
Unit <rtc32_v14> synthesized.


Synthesizing Unit <sl_10lsb_4817575a2c>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:10>> is assigned but never used.
Unit <sl_10lsb_4817575a2c> synthesized.


Synthesizing Unit <sl_10lsb1_e3e25df95e>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:10>> is assigned but never used.
Unit <sl_10lsb1_e3e25df95e> synthesized.


Synthesizing Unit <concat_ddc54e5835>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_ddc54e5835> synthesized.


Synthesizing Unit <inverter_b526fbe439>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <op_mem_22_20_back<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <op_mem_22_20_front_din> is never used or assigned.
Unit <inverter_b526fbe439> synthesized.


Synthesizing Unit <reinterpret_d4aaa1bdfb>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret_d4aaa1bdfb> synthesized.


Synthesizing Unit <slice_548b816da1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<6:0>> is assigned but never used.
Unit <slice_548b816da1> synthesized.


Synthesizing Unit <slice1_ca2b52d742>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7>> is assigned but never used.
Unit <slice1_ca2b52d742> synthesized.


Synthesizing Unit <concat_c2ceb1b433>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_c2ceb1b433> synthesized.


Synthesizing Unit <inverter_2f02a7b0ae>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <op_mem_22_20_back<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <op_mem_22_20_front_din> is never used or assigned.
Unit <inverter_2f02a7b0ae> synthesized.


Synthesizing Unit <reinterpret_b4b31b4648>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret_b4b31b4648> synthesized.


Synthesizing Unit <slice_1145e8f1a6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<6:0>> is assigned but never used.
Unit <slice_1145e8f1a6> synthesized.


Synthesizing Unit <slice1_30272eab40>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7>> is assigned but never used.
Unit <slice1_30272eab40> synthesized.


Synthesizing Unit <concat_f31155dc36>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_f31155dc36> synthesized.


Synthesizing Unit <inverter_deb105cfd5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <op_mem_22_20_back<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <op_mem_22_20_front_din> is never used or assigned.
Unit <inverter_deb105cfd5> synthesized.


Synthesizing Unit <reinterpret_1953f27fdf>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret_1953f27fdf> synthesized.


Synthesizing Unit <slice_17b71bf882>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<6:0>> is assigned but never used.
Unit <slice_17b71bf882> synthesized.


Synthesizing Unit <slice1_b8da15b44a>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7>> is assigned but never used.
Unit <slice1_b8da15b44a> synthesized.


Synthesizing Unit <concat_8f2a4bed20>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_8f2a4bed20> synthesized.


Synthesizing Unit <inverter_f6278b222a>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <op_mem_22_20_back<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <op_mem_22_20_front_din> is never used or assigned.
Unit <inverter_f6278b222a> synthesized.


Synthesizing Unit <reinterpret_28813488a0>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret_28813488a0> synthesized.


Synthesizing Unit <slice_4086228a71>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<6:0>> is assigned but never used.
Unit <slice_4086228a71> synthesized.


Synthesizing Unit <slice1_dc1027beb6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7>> is assigned but never used.
Unit <slice1_dc1027beb6> synthesized.


Synthesizing Unit <concat_c6213979ad>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_c6213979ad> synthesized.


Synthesizing Unit <inverter_14e3210e70>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <op_mem_22_20_back<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <op_mem_22_20_front_din> is never used or assigned.
Unit <inverter_14e3210e70> synthesized.


Synthesizing Unit <reinterpret_c607a35a29>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret_c607a35a29> synthesized.


Synthesizing Unit <slice_d1e6bddb3b>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<6:0>> is assigned but never used.
Unit <slice_d1e6bddb3b> synthesized.


Synthesizing Unit <slice1_c85fcf892b>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7>> is assigned but never used.
Unit <slice1_c85fcf892b> synthesized.


Synthesizing Unit <concat_abceb0e700>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_abceb0e700> synthesized.


Synthesizing Unit <inverter_1583af95f1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <op_mem_22_20_back<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <op_mem_22_20_front_din> is never used or assigned.
Unit <inverter_1583af95f1> synthesized.


Synthesizing Unit <reinterpret_7eef37775d>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret_7eef37775d> synthesized.


Synthesizing Unit <slice_58a5b34657>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<6:0>> is assigned but never used.
Unit <slice_58a5b34657> synthesized.


Synthesizing Unit <slice1_94a4a96ba5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7>> is assigned but never used.
Unit <slice1_94a4a96ba5> synthesized.


Synthesizing Unit <concat_c79d543ed9>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_c79d543ed9> synthesized.


Synthesizing Unit <inverter_8ce249e4c9>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <op_mem_22_20_back<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <op_mem_22_20_front_din> is never used or assigned.
Unit <inverter_8ce249e4c9> synthesized.


Synthesizing Unit <reinterpret_955f8abbef>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret_955f8abbef> synthesized.


Synthesizing Unit <slice_510bfcefde>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<6:0>> is assigned but never used.
Unit <slice_510bfcefde> synthesized.


Synthesizing Unit <slice1_a788d95eec>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7>> is assigned but never used.
Unit <slice1_a788d95eec> synthesized.


Synthesizing Unit <concat_bc5e36d4ea>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_bc5e36d4ea> synthesized.


Synthesizing Unit <inverter_e88d30344f>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <op_mem_22_20_back<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <op_mem_22_20_front_din> is never used or assigned.
Unit <inverter_e88d30344f> synthesized.


Synthesizing Unit <reinterpret_bb5704daa0>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret_bb5704daa0> synthesized.


Synthesizing Unit <slice_ada6dabeed>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<6:0>> is assigned but never used.
Unit <slice_ada6dabeed> synthesized.


Synthesizing Unit <slice1_024135aade>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7>> is assigned but never used.
Unit <slice1_024135aade> synthesized.


Synthesizing Unit <convert_func_call_1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <convert_func_call_1> synthesized.


Synthesizing Unit <concat1_91f6e5894e>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat1_91f6e5894e> synthesized.


Synthesizing Unit <reinterpret1_421868fdcf>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret1_421868fdcf> synthesized.


Synthesizing Unit <reinterpret2_af838af55d>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret2_af838af55d> synthesized.


Synthesizing Unit <reinterpret3_8118b8df3f>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret3_8118b8df3f> synthesized.


Synthesizing Unit <reinterpret4_b77a7b0ce0>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret4_b77a7b0ce0> synthesized.


Synthesizing Unit <concat1_8254fe26d1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat1_8254fe26d1> synthesized.


Synthesizing Unit <reinterpret1_209a7f1ccf>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret1_209a7f1ccf> synthesized.


Synthesizing Unit <reinterpret2_f735414ec3>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret2_f735414ec3> synthesized.


Synthesizing Unit <reinterpret3_f487f886c1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret3_f487f886c1> synthesized.


Synthesizing Unit <reinterpret4_5b4e0dc295>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret4_5b4e0dc295> synthesized.


Synthesizing Unit <bit0_eab550d1c0>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:8>> is assigned but never used.
Unit <bit0_eab550d1c0> synthesized.


Synthesizing Unit <bit16_f5ebc38801>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:24>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<15:0>> is assigned but never used.
Unit <bit16_f5ebc38801> synthesized.


Synthesizing Unit <bit24_c653e87f15>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<23:0>> is assigned but never used.
Unit <bit24_c653e87f15> synthesized.


Synthesizing Unit <bit8_6a4da2d14b>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:16>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<7:0>> is assigned but never used.
Unit <bit8_6a4da2d14b> synthesized.


Synthesizing Unit <reinterpret4_2cede6fcef>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret4_2cede6fcef> synthesized.


Synthesizing Unit <reinterpret5_ddc5355546>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret5_ddc5355546> synthesized.


Synthesizing Unit <reinterpret6_0562bbbdfa>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret6_0562bbbdfa> synthesized.


Synthesizing Unit <reinterpret7_28693a4e8c>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret7_28693a4e8c> synthesized.


Synthesizing Unit <bit0_5b70faa9e1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:8>> is assigned but never used.
Unit <bit0_5b70faa9e1> synthesized.


Synthesizing Unit <bit16_0899a8c2cd>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:24>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<15:0>> is assigned but never used.
Unit <bit16_0899a8c2cd> synthesized.


Synthesizing Unit <bit24_6703f73bb4>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<23:0>> is assigned but never used.
Unit <bit24_6703f73bb4> synthesized.


Synthesizing Unit <bit8_a5f685fcb4>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:16>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<7:0>> is assigned but never used.
Unit <bit8_a5f685fcb4> synthesized.


Synthesizing Unit <reinterpret4_0bfe5a8dd8>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret4_0bfe5a8dd8> synthesized.


Synthesizing Unit <reinterpret5_ad5fcc0cc6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret5_ad5fcc0cc6> synthesized.


Synthesizing Unit <reinterpret6_0f88bc95f6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret6_0f88bc95f6> synthesized.


Synthesizing Unit <reinterpret7_1f25723006>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <reinterpret7_1f25723006> synthesized.


Synthesizing Unit <concat_d694665e71>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_d694665e71> synthesized.


Synthesizing Unit <concat1_3055210e70>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat1_3055210e70> synthesized.


Synthesizing Unit <concat2_7c7ec05f81>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat2_7c7ec05f81> synthesized.


Synthesizing Unit <concat3_c4dc34b1a7>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat3_c4dc34b1a7> synthesized.


Synthesizing Unit <constant1_699d7f1eeb>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant1_699d7f1eeb> synthesized.


Synthesizing Unit <constant2_5f1cd7b048>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant2_5f1cd7b048> synthesized.


Synthesizing Unit <constant3_d786e11d4e>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant3_d786e11d4e> synthesized.


Synthesizing Unit <constant4_21438855e4>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant4_21438855e4> synthesized.


Synthesizing Unit <constant5_075adb46bf>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant5_075adb46bf> synthesized.


Synthesizing Unit <constant6_49c14364ee>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant6_49c14364ee> synthesized.


Synthesizing Unit <concat_df7186a2e1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <concat_df7186a2e1> synthesized.


Synthesizing Unit <constant8_cb133a1117>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <constant8_cb133a1117> synthesized.


Synthesizing Unit <lsb1_e6a95c1af1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7:1>> is assigned but never used.
Unit <lsb1_e6a95c1af1> synthesized.


Synthesizing Unit <lsb3_b3a1c0e2cd>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7:3>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<1:0>> is assigned but never used.
Unit <lsb3_b3a1c0e2cd> synthesized.


Synthesizing Unit <xlpassthrough_1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xlpassthrough_1> synthesized.


Synthesizing Unit <xlpassthrough_2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xlpassthrough_2> synthesized.


Synthesizing Unit <xlpassthrough_3>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xlpassthrough_3> synthesized.


Synthesizing Unit <sl_5lsb_82c15f848e>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7:5>> is assigned but never used.
Unit <sl_5lsb_82c15f848e> synthesized.


Synthesizing Unit <sl_5lsb_1_85931bdd03>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<7:5>> is assigned but never used.
Unit <sl_5lsb_1_85931bdd03> synthesized.


Synthesizing Unit <sl_byte0_4d9050d309>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:8>> is assigned but never used.
Unit <sl_byte0_4d9050d309> synthesized.


Synthesizing Unit <sl_byte1_21a54b9e61>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:16>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<7:0>> is assigned but never used.
Unit <sl_byte1_21a54b9e61> synthesized.


Synthesizing Unit <sl_byte2_3628a88f76>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<31:24>> is assigned but never used.
WARNING:Xst:646 - Signal <x_1_22<15:0>> is assigned but never used.
Unit <sl_byte2_3628a88f76> synthesized.


Synthesizing Unit <sl_byte3_9d1210cfbd>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:646 - Signal <x_1_22<23:0>> is assigned but never used.
Unit <sl_byte3_9d1210cfbd> synthesized.


Synthesizing Unit <inverter2_2ab0852d89>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
    Found 1-bit register for signal <op_mem_22_20<0>>.
    Summary:
	inferred   1 D-type flip-flop(s).
Unit <inverter2_2ab0852d89> synthesized.


Synthesizing Unit <logical1_dc01bcb7e5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <logical1_dc01bcb7e5> synthesized.


Synthesizing Unit <convert_func_call_2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <din<91:32>> is never used.
Unit <convert_func_call_2> synthesized.


Synthesizing Unit <convert_func_call_3>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <convert_func_call_3> synthesized.


Synthesizing Unit <convert_func_call_4>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <din<32:16>> is never used.
Unit <convert_func_call_4> synthesized.


Synthesizing Unit <convert_func_call_5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <din<31:16>> is never used.
Unit <convert_func_call_5> synthesized.


Synthesizing Unit <convert_func_call_6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <din<63:32>> is never used.
Unit <convert_func_call_6> synthesized.


Synthesizing Unit <simpleFIFO>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <ce> is never used.
    Found 12x64-bit dual-port RAM <Mram_memory> for signal <memory>.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
    Found 1-bit register for signal <valid>.
    Found 64-bit register for signal <dout>.
    Found 4-bit up counter for signal <count_v>.
    Found 4-bit adder for signal <count_v$addsub0000> created at line 9189.
    Found 4-bit subtractor for signal <count_v$sub0000> created at line 9199.
    Found 1-bit register for signal <empty_v>.
    Found 1-bit register for signal <full_v>.
    Found 4-bit up counter for signal <rd_addr_v>.
    Found 4-bit up counter for signal <wr_addr_v>.
    Summary:
	inferred   1 RAM(s).
	inferred   3 Counter(s).
	inferred  67 D-type flip-flop(s).
	inferred   2 Adder/Subtractor(s).
Unit <simpleFIFO> synthesized.


Synthesizing Unit <single_reg_w_init_1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <single_reg_w_init_1> synthesized.


Synthesizing Unit <adccat1_entity_e02ada5f8a>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <adccat1_entity_e02ada5f8a> synthesized.


Synthesizing Unit <adccat2_entity_ceac40d612>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <adccat2_entity_ceac40d612> synthesized.


Synthesizing Unit <adcuncat1_entity_eb19c49dca>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <adcuncat1_entity_eb19c49dca> synthesized.


Synthesizing Unit <adcuncat2_entity_4514881654>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <adcuncat2_entity_4514881654> synthesized.


Synthesizing Unit <xladdsub>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <c_in<0>> is never used.
WARNING:Xst:1780 - Signal <override> is never used or assigned.
WARNING:Xst:1780 - Signal <temp_cout> is never used or assigned.
WARNING:Xst:1780 - Signal <extra_reg_ce> is never used or assigned.
WARNING:Xst:646 - Signal <logic1<0>> is assigned but never used.
WARNING:Xst:646 - Signal <internal_clr> is assigned but never used.
Unit <xladdsub> synthesized.


Synthesizing Unit <assemblestatus_entity_7fd680fdc6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <assemblestatus_entity_7fd680fdc6> synthesized.


Synthesizing Unit <configsys_entity_72b77062d8>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <configsys_entity_72b77062d8> synthesized.


Synthesizing Unit <led0_entity_adcb04e180>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <led0_entity_adcb04e180> synthesized.


Synthesizing Unit <led1_entity_6df427b2a9>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <led1_entity_6df427b2a9> synthesized.


Synthesizing Unit <led2_entity_a89ed2d92f>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <led2_entity_a89ed2d92f> synthesized.


Synthesizing Unit <led3_entity_de4918e802>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <led3_entity_de4918e802> synthesized.


Synthesizing Unit <led6_entity_89f383e74d>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <led6_entity_89f383e74d> synthesized.


Synthesizing Unit <led7_entity_fc9cf74af9>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <led7_entity_fc9cf74af9> synthesized.


Synthesizing Unit <posedge_entity_aac04e502a>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <posedge_entity_aac04e502a> synthesized.


Synthesizing Unit <vdif_packetizer_v15>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <ce> is never used.
WARNING:Xst:647 - Input <complex> is never used.
WARNING:Xst:647 - Input <enable> is never used.
WARNING:Xst:1780 - Signal <pps_pulse> is never used or assigned.
    Found finite state machine <FSM_0> for signal <vdif_state>.
    -----------------------------------------------------------------------
    | States             | 6                                              |
    | Transitions        | 8                                              |
    | Inputs             | 2                                              |
    | Outputs            | 6                                              |
    | Clock              | clk (rising_edge)                              |
    | Reset              | rst (positive)                                 |
    | Reset type         | asynchronous                                   |
    | Reset State        | wait_data                                      |
    | Power Up State     | wait_data                                      |
    | Encoding           | automatic                                      |
    | Implementation     | automatic                                      |
    -----------------------------------------------------------------------
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst - Property "use_dsp48" is not applicable for this technology.
    Found 1-bit register for signal <tx_discard>.
    Found 1-bit register for signal <clockin_enable>.
    Found 1-bit register for signal <datafifo_rden>.
    Found 1-bit register for signal <dw64_count_ended>.
    Found 13-bit comparator equal for signal <dw64_count_ended$cmp_eq0000> created at line 9532.
    Found 13-bit register for signal <dw64_count_plus1_v>.
    Found 13-bit adder for signal <dw64_count_plus1_v$add0000> created at line 9546.
    Found 1-bit register for signal <dw64_count_prefinal>.
    Found 13-bit comparator equal for signal <dw64_count_prefinal$cmp_eq0000> created at line 9528.
    Found 1-bit register for signal <dw64_count_prefinal_v>.
    Found 13-bit register for signal <dw64_count_v>.
    Found 13-bit register for signal <dw64_target_minus1_v>.
    Found 13-bit subtractor for signal <dw64_target_minus1_v$sub0000> created at line 9545.
    Found 13-bit register for signal <dw64_target_v>.
    Found 27-bit adder for signal <framecounter_v$addsub0000> created at line 9490.
    Found 27-bit register for signal <framecounter_v$mux0001> created at line 9474.
    Found 1-bit register for signal <old_epsecond_v>.
    Found 5-bit register for signal <s_bitspersample_m1>.
    Found 5-bit subtractor for signal <s_bitspersample_m1$sub0000> created at line 9382.
    Found 10-bit register for signal <s_dw64_per_frame>.
    Found 10-bit register for signal <s_dw64_per_frame_m1>.
    Found 10-bit subtractor for signal <s_dw64_per_frame_m1$sub0000> created at line 9381.
    Found 6-bit register for signal <s_epoch>.
    Found 30-bit register for signal <s_epseconds>.
    Found 1-bit register for signal <seconds_changed_v>.
    Found 1-bit xor2 for signal <seconds_changed_v$xor0000> created at line 9481.
    Summary:
	inferred   1 Finite State Machine(s).
	inferred  96 D-type flip-flop(s).
	inferred   5 Adder/Subtractor(s).
	inferred   2 Comparator(s).
Unit <vdif_packetizer_v15> synthesized.


Synthesizing Unit <conv1_entity_99e0255406>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <conv1_entity_99e0255406> synthesized.


Synthesizing Unit <conv2_entity_8ea5768454>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <conv2_entity_8ea5768454> synthesized.


Synthesizing Unit <conv3_entity_96c1e66e28>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <conv3_entity_96c1e66e28> synthesized.


Synthesizing Unit <conv4_entity_91fe140263>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <conv4_entity_91fe140263> synthesized.


Synthesizing Unit <conv5_entity_d456057b01>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <conv5_entity_d456057b01> synthesized.


Synthesizing Unit <conv6_entity_98cfaee0c2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <conv6_entity_98cfaee0c2> synthesized.


Synthesizing Unit <conv7_entity_c2e26db709>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <conv7_entity_c2e26db709> synthesized.


Synthesizing Unit <conv_entity_f5df0b0e65>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <conv_entity_f5df0b0e65> synthesized.


Synthesizing Unit <xlconvert_2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <xlconvert_2> synthesized.


Synthesizing Unit <srl17e_1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <srl17e_1> synthesized.


Synthesizing Unit <srl17e_2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <srl17e_2> synthesized.


Synthesizing Unit <srl17e_3>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <srl17e_3> synthesized.


Synthesizing Unit <srl17e_4>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <srl17e_4> synthesized.


Synthesizing Unit <srl17e_5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <srl17e_5> synthesized.


Synthesizing Unit <srl17e_6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <srl17e_6> synthesized.


Synthesizing Unit <srl17e_7>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <srl17e_7> synthesized.


Synthesizing Unit <single_reg_w_init_2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <single_reg_w_init_2> synthesized.


Synthesizing Unit <xlconvert_3>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <xlconvert_3> synthesized.


Synthesizing Unit <xlconvert_4>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <xlconvert_4> synthesized.


Synthesizing Unit <xlconvert_5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <xlconvert_5> synthesized.


Synthesizing Unit <xlconvert_6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <xlconvert_6> synthesized.


Synthesizing Unit <xlconvert_7>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clk> is never used.
WARNING:Xst:647 - Input <clr> is never used.
WARNING:Xst:647 - Input <ce> is never used.
Unit <xlconvert_7> synthesized.


Synthesizing Unit <synth_reg_w_init_1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <synth_reg_w_init_1> synthesized.


Synthesizing Unit <adc_entity_9852d04a8e>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <adc_entity_9852d04a8e> synthesized.


Synthesizing Unit <adc_data_i_entity_a3a8938725>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <adc_data_i_entity_a3a8938725> synthesized.


Synthesizing Unit <adc_data_q_entity_64b50d7ffe>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <adc_data_q_entity_64b50d7ffe> synthesized.


Synthesizing Unit <rtc_time_entity_e8033653dc>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <rtc_time_entity_e8033653dc> synthesized.


Synthesizing Unit <status_entity_c438123aa7>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <status_entity_c438123aa7> synthesized.


Synthesizing Unit <ten_gbe1_entity_b0a1ef16c5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <ten_gbe1_entity_b0a1ef16c5> synthesized.


Synthesizing Unit <ten_gbe2_entity_ddd9f696b9>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <ten_gbe2_entity_ddd9f696b9> synthesized.


Synthesizing Unit <twobit_data_i_entity_0b92d44297>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <twobit_data_i_entity_0b92d44297> synthesized.


Synthesizing Unit <twobit_data_q_entity_b7296da730>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <twobit_data_q_entity_b7296da730> synthesized.


Synthesizing Unit <synth_reg_1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
Unit <synth_reg_1> synthesized.


Synthesizing Unit <synth_reg_2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
Unit <synth_reg_2> synthesized.


Synthesizing Unit <synth_reg_3>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
Unit <synth_reg_3> synthesized.


Synthesizing Unit <synth_reg_4>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
Unit <synth_reg_4> synthesized.


Synthesizing Unit <synth_reg_5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
Unit <synth_reg_5> synthesized.


Synthesizing Unit <synth_reg_6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
Unit <synth_reg_6> synthesized.


Synthesizing Unit <synth_reg_7>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:647 - Input <clr> is never used.
Unit <synth_reg_7> synthesized.


Synthesizing Unit <synth_reg_w_init_2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <synth_reg_w_init_2> synthesized.


Synthesizing Unit <xlclockdriver>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m_cw.vhd".
WARNING:Xst:1780 - Signal <ce_vec> is never used or assigned.
WARNING:Xst:1780 - Signal <internal_ce> is never used or assigned.
    Found T flip-flop for signal <clk_num<0>>.
    Summary:
	inferred   1 T-type flip-flop(s).
Unit <xlclockdriver> synthesized.


Synthesizing Unit <xldelay_1>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xldelay_1> synthesized.


Synthesizing Unit <xldelay_2>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xldelay_2> synthesized.


Synthesizing Unit <xldelay_3>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xldelay_3> synthesized.


Synthesizing Unit <xldelay_4>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xldelay_4> synthesized.


Synthesizing Unit <xldelay_5>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xldelay_5> synthesized.


Synthesizing Unit <xldelay_6>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xldelay_6> synthesized.


Synthesizing Unit <xldelay_7>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xldelay_7> synthesized.


Synthesizing Unit <xlregister>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
Unit <xlregister> synthesized.


Synthesizing Unit <expres4g1024M_clock_driver>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m_cw.vhd".
Unit <expres4g1024M_clock_driver> synthesized.


Synthesizing Unit <expres4g1024m>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m.vhd".
WARNING:Xst:646 - Signal <gateway_in4_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_national_semi_pll_user_data_out_net> is assigned but never used.
WARNING:Xst:646 - Signal <bitreducer8to2_v10_1_syncs_out_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe2_rx_source_ip_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe2_rx_source_port_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe2_rx_size_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe1_rx_data_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_adc_user_outofrangeq0_net> is assigned but never used.
WARNING:Xst:646 - Signal <vdif_packetizer_v15_dbg_fifo_empty_net> is assigned but never used.
WARNING:Xst:646 - Signal <bitreducer8to2_v10_2_sync_out_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe1_tx_ack_net> is assigned but never used.
WARNING:Xst:646 - Signal <bitreducer8to2_v10_2_syncs_out_net> is assigned but never used.
WARNING:Xst:646 - Signal <vdif_packetizer_v15_2_dbg_dw64counter_net> is assigned but never used.
WARNING:Xst:646 - Signal <gateway_in5_net> is assigned but never used.
WARNING:Xst:646 - Signal <gateway_in1_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe1_led_up_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_adc_user_outofrangeq1_net> is assigned but never used.
WARNING:Xst:646 - Signal <gateway_in6_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe2_rx_data_net> is assigned but never used.
WARNING:Xst:646 - Signal <gateway_in2_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe1_rx_source_port_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_adc_user_outofrangei0_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe1_rx_end_of_frame_net> is assigned but never used.
WARNING:Xst:646 - Signal <vdif_packetizer_v15_dbg_dw64counter_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe2_tx_ack_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe2_rx_end_of_frame_net> is assigned but never used.
WARNING:Xst:646 - Signal <gateway_in3_net> is assigned but never used.
WARNING:Xst:646 - Signal <gateway_in_net> is assigned but never used.
WARNING:Xst:646 - Signal <vdif_packetizer_v15_2_dbg_fifo_empty_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe2_led_up_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe1_rx_size_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_ten_gbe1_rx_source_ip_net> is assigned but never used.
WARNING:Xst:646 - Signal <expres4g1024m_adc_user_outofrangei1_net> is assigned but never used.
Unit <expres4g1024m> synthesized.


Synthesizing Unit <expres4g1024m_cw>.
    Related source file is "C:/ibob-jw/training/expres4g1024M/sysgen/synth_model/expres4g1024m_cw.vhd".
WARNING:Xst:647 - Input <ce> is never used.
Unit <expres4g1024m_cw> synthesized.

WARNING:Xst:524 - All outputs of the instance <clk_probe> of the block <xlclkprobe> are unconnected in block <expres4g1024m_cw>.
   This instance will be removed from the design along with all underlying logic

=========================================================================
HDL Synthesis Report

Macro Statistics
# RAMs                                                 : 2
 12x64-bit dual-port RAM                               : 2
# Adders/Subtractors                                   : 16
 10-bit subtractor                                     : 2
 13-bit adder                                          : 2
 13-bit subtractor                                     : 2
 27-bit adder                                          : 2
 32-bit adder                                          : 2
 4-bit adder                                           : 2
 4-bit subtractor                                      : 2
 5-bit subtractor                                      : 2
# Counters                                             : 11
 3-bit up counter                                      : 2
 32-bit up counter                                     : 2
 4-bit up counter                                      : 7
# Registers                                            : 110
 1-bit register                                        : 67
 10-bit register                                       : 4
 13-bit register                                       : 8
 27-bit register                                       : 2
 30-bit register                                       : 2
 32-bit register                                       : 9
 5-bit register                                        : 2
 6-bit register                                        : 2
 64-bit register                                       : 6
 8-bit register                                        : 8
# Comparators                                          : 22
 13-bit comparator equal                               : 4
 32-bit comparator greatequal                          : 1
 32-bit comparator lessequal                           : 1
 8-bit comparator greatequal                           : 8
 8-bit comparator lessequal                            : 8
# Multiplexers                                         : 2
 32-bit 4-to-1 multiplexer                             : 2
# Xors                                                 : 2
 1-bit xor2                                            : 2

=========================================================================

=========================================================================
*                       Advanced HDL Synthesis                          *
=========================================================================

Analyzing FSM <FSM_0> for best encoding.
Optimizing FSM <expres4g1024m_x0/vdif_packetizer_v15_2/vdif_state> on signal <vdif_state[1:3]> with johnson encoding.
Optimizing FSM <expres4g1024m_x0/vdif_packetizer_v15_x0/vdif_state> on signal <vdif_state[1:3]> with johnson encoding.
-----------------------------
 State           | Encoding
-----------------------------
 wait_data       | 000
 send_hdr_dword0 | 001
 send_hdr_dword1 | 011
 send_hdr_dword2 | 111
 send_hdr_dword3 | 110
 send_userdata   | 100
-----------------------------
Reading core <xlpersistentdff.ngc>.
Executing edif2ngd -noa "adder_subtracter_virtex2p_7_0_23d84c584623d65e.edn" "adder_subtracter_virtex2p_7_0_23d84c584623d65e.ngo"
Release 9.1.03i - edif2ngd J.33
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.
INFO:NgdBuild - Release 9.1.03i edif2ngd J.33
INFO:NgdBuild - Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.
Writing module to "adder_subtracter_virtex2p_7_0_23d84c584623d65e.ngo"...
Loading core <xlpersistentdff> for timing and area information for instance <persistentdff_inst>.
Loading core <adder_subtracter_virtex2p_7_0_23d84c584623d65e> for timing and area information for instance <comp0.core_instance0>.
Loading device for application Rf_Device from file '2vp50.nph' in environment C:\Xilinx91i.
INFO:Xst:2691 - Unit <simpleFIFO> : The RAM <Mram_memory> will be implemented as a BLOCK RAM, absorbing the following register(s): <dout>.
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 12-word x 64-bit                    |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk>           | rise     |
    |     weA            | connected to signal <_and0000>      | high     |
    |     addrA          | connected to signal <wr_addr_v>     |          |
    |     diA            | connected to signal <din>           |          |
    -----------------------------------------------------------------------
    | Port B                                                              |
    |     aspect ratio   | 12-word x 64-bit                    |          |
    |     mode           | write-first                         |          |
    |     clkB           | connected to signal <clk>           | rise     |
    |     enB            | connected to signal <dout_and0000>  | high     |
    |     addrB          | connected to signal <rd_addr_v>     |          |
    |     doB            | connected to signal <dout>          |          |
    -----------------------------------------------------------------------

=========================================================================
Advanced HDL Synthesis Report

Macro Statistics
# FSMs                                                 : 1
# RAMs                                                 : 2
 12x64-bit dual-port block RAM                         : 2
# Adders/Subtractors                                   : 16
 10-bit subtractor                                     : 2
 13-bit adder                                          : 2
 13-bit subtractor                                     : 2
 27-bit adder                                          : 2
 32-bit adder                                          : 2
 4-bit adder                                           : 2
 4-bit subtractor                                      : 2
 5-bit subtractor                                      : 2
# Counters                                             : 11
 3-bit up counter                                      : 2
 32-bit up counter                                     : 2
 4-bit up counter                                      : 7
# Registers                                            : 1739
 Flip-Flops                                            : 1739
# Comparators                                          : 22
 13-bit comparator equal                               : 4
 32-bit comparator greatequal                          : 1
 32-bit comparator lessequal                           : 1
 8-bit comparator greatequal                           : 8
 8-bit comparator lessequal                            : 8
# Multiplexers                                         : 64
 1-bit 4-to-1 multiplexer                              : 64
# Xors                                                 : 2
 1-bit xor2                                            : 2

=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================
INFO:Xst:2261 - The FF/Latch <seconds_0> in Unit <rtc32_v14> is equivalent to the following FF/Latch, which will be removed : <pps_toggle> 
INFO:Xst:2261 - The FF/Latch <dw64_target_v_11> in Unit <vdif_packetizer_v15> is equivalent to the following 2 FFs/Latches, which will be removed : <dw64_target_v_10> <dw64_target_v_12> 
WARNING:Xst:1426 - The value init of the FF/Latch systick_1 hinder the constant cleaning in the block rtc32_v14.
   You should achieve better results by setting this init to 1.
WARNING:Xst:1293 - FF/Latch  <dw64_target_v_11> has a constant value of 0 in block <vdif_packetizer_v15>.
WARNING:Xst:2677 - Node <framecounter_v_mux0001_24> of sequential type is unconnected in block <vdif_packetizer_v15>.
WARNING:Xst:2677 - Node <framecounter_v_mux0001_25> of sequential type is unconnected in block <vdif_packetizer_v15>.
WARNING:Xst:2677 - Node <framecounter_v_mux0001_26> of sequential type is unconnected in block <vdif_packetizer_v15>.
INFO:Xst:2261 - The FF/Latch <dw64_target_minus1_v_11> in Unit <vdif_packetizer_v15> is equivalent to the following 2 FFs/Latches, which will be removed : <dw64_target_minus1_v_10> <dw64_target_minus1_v_12> 

Optimizing unit <expres4g1024m_cw> ...

Optimizing unit <bitreducer8to2_v10> ...

Optimizing unit <rtc32_v14> ...

Optimizing unit <simpleFIFO> ...

Optimizing unit <srl17e_1> ...

Optimizing unit <srl17e_3> ...

Optimizing unit <srl17e_5> ...

Optimizing unit <srl17e_6> ...

Optimizing unit <srl17e_7> ...

Optimizing unit <single_reg_w_init_2> ...

Optimizing unit <vdif_packetizer_v15> ...

Optimizing unit <expres4g1024m> ...
WARNING:Xst:1293 - FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_2/s_epoch_0> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_2/s_epoch_1> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_2/s_epoch_2> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_2/s_epoch_3> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_2/s_epoch_4> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_2/s_epoch_5> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epoch_0> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epoch_1> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epoch_2> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epoch_3> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epoch_4> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch  <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epoch_5> has a constant value of 0 in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/vdif_packetizer_v15_2/datainput_fifo/full_v> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/vdif_packetizer_v15_x0/datainput_fifo/full_v> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_1/output_syncs_l_0> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_1/output_syncs_l_1> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_1/output_syncs_l_2> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_1/output_syncs_l_3> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_1/output_syncs_l_4> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_1/output_syncs_l_5> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_1/output_syncs_l_6> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_1/output_syncs_l_7> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/sm_sync> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_sync_l> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/shifter_syncs_0> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/shifter_syncs_1> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/shifter_syncs_2> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/shifter_syncs_3> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/shifter_syncs_4> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/shifter_syncs_5> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/shifter_syncs_6> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/shifter_syncs_7> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_syncs_l_0> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_syncs_l_1> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_syncs_l_2> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_syncs_l_3> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_syncs_l_4> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_syncs_l_5> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_syncs_l_6> of sequential type is unconnected in block <expres4g1024m_cw>.
WARNING:Xst:2677 - Node <expres4g1024m_x0/bitreducer8to2_v10_2/output_syncs_l_7> of sequential type is unconnected in block <expres4g1024m_cw>.

Mapping all equations...
Building and optimizing final netlist ...
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_bitspersample_m1_1> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_bitspersample_m1_1> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_12> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_12> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_24> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_24> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_bitspersample_m1_3> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_bitspersample_m1_3> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_11> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_11> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_15> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_15> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_3> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_3> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_16> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_16> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_14> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_14> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_9> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_9> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_8> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_8> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_27> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_27> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_5> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_5> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_19> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_19> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_23> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_23> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_7> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_7> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_6> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_6> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_3> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_3> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_7> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_7> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_6> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_6> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_17> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_17> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_0> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_0> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_18> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_18> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_1> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_1> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_0> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_0> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_2> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_2> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_0> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_0> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_21> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_21> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_9> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_9> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_25> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_25> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_29> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_29> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_22> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_22> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_4> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_4> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_bitspersample_m1_4> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_bitspersample_m1_4> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_28> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_28> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_20> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_20> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_bitspersample_m1_2> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_bitspersample_m1_2> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_10> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_10> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_13> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_13> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_7> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_7> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_1> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_1> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_3> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_3> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_bitspersample_m1_0> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_bitspersample_m1_0> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_2> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_2> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_2> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_2> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_5> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_5> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_4> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_4> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_8> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_8> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_1> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_1> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/bitreducer8to2_v10_1/sm_valid> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/bitreducer8to2_v10_2/sm_valid> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_epseconds_26> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_epseconds_26> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_6> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_6> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_8> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_8> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_4> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_4> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_9> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_9> 
INFO:Xst:2261 - The FF/Latch <expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_m1_5> in Unit <expres4g1024m_cw> is equivalent to the following FF/Latch, which will be removed : <expres4g1024m_x0/vdif_packetizer_v15_x0/s_dw64_per_frame_m1_5> 

Final Macro Processing ...

Processing Unit <expres4g1024m_cw> :
	Found 2-bit shift register for signal <expres4g1024m_x0/rtc32_v14_x0/before_end_1_0>.
	Found 2-bit shift register for signal <expres4g1024m_x0/rtc32_v14_x0/passed_start_1_0>.
Unit <expres4g1024m_cw> processed.

=========================================================================
Final Register Report

Macro Statistics
# Registers                                            : 1720
 Flip-Flops                                            : 1720
# Shift Registers                                      : 2
 2-bit shift register                                  : 2

=========================================================================

=========================================================================
*                          Partition Report                             *
=========================================================================

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

=========================================================================
*                            Final Report                               *
=========================================================================
Final Results
Top Level Output File Name         : expres4g1024m_cw.ngc
Output Format                      : NGC
Optimization Goal                  : SPEED
Keep Hierarchy                     : NO

Design Statistics
# IOs                              : 1132

Cell Usage :
# BELS                             : 2006
#      GND                         : 2
#      INV                         : 28
#      LUT1                        : 170
#      LUT2                        : 303
#      LUT2_D                      : 4
#      LUT3                        : 182
#      LUT3_D                      : 3
#      LUT3_L                      : 4
#      LUT4                        : 499
#      LUT4_D                      : 3
#      LUT4_L                      : 6
#      MUXCY                       : 452
#      MUXF5                       : 122
#      VCC                         : 1
#      XORCY                       : 227
# FlipFlops/Latches                : 1756
#      FD                          : 260
#      FDC                         : 40
#      FDCE                        : 120
#      FDCP                        : 2
#      FDE                         : 686
#      FDP                         : 22
#      FDPE                        : 6
#      FDR                         : 82
#      FDRE                        : 537
#      FDSE                        : 1
# RAMS                             : 4
#      RAMB16_S36_S36              : 4
# Shift Registers                  : 651
#      SRL16                       : 2
#      SRL16E                      : 649
=========================================================================

Device utilization summary:
---------------------------

Selected Device : 2vp50ff1152-7 

 Number of Slices:                    1281  out of  23616     5%  
 Number of Slice Flip Flops:          1756  out of  47232     3%  
 Number of 4 input LUTs:              1853  out of  47232     3%  
    Number used as logic:             1202
    Number used as Shift registers:    651
 Number of IOs:                       1132
 Number of bonded IOBs:                  0  out of    692     0%  
 Number of BRAMs:                        4  out of    232     1%  

---------------------------
Partition Resource Summary:
---------------------------

  No Partitions were found in this design.

---------------------------


=========================================================================
TIMING REPORT

NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
      FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
      GENERATED AFTER PLACE-and-ROUTE.

Clock Information:
------------------
-----------------------------------+-------------------------------------------------------+-------+
Clock Signal                       | Clock buffer(FF name)                                 | Load  |
-----------------------------------+-------------------------------------------------------+-------+
clk                                | NONE(expres4g1024m_x0/bitreducer8to2_v10_2/output_l_6)| 2411  |
-----------------------------------+-------------------------------------------------------+-------+
INFO:Xst:2169 - HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.

Asynchronous Control Signals Information:
----------------------------------------
------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+-------+
Control Signal                                                                                                                      | Buffer(FF name)                                                        | Load  |
------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+-------+
expres4g1024m_x0/dly19_q_net(expres4g1024m_x0/dly19/srl_delay.synth_reg_srl_inst/partial_one.last_srl17e/reg_array[0].fde_used.u2:Q)| NONE(expres4g1024m_x0/vdif_packetizer_v15_2/dw64_count_plus1_v_8)      | 94    |
expres4g1024m_x0/dly9_q_net(expres4g1024m_x0/dly9/srl_delay.synth_reg_srl_inst/partial_one.last_srl17e/reg_array[0].fde_used.u2:Q)  | NONE(expres4g1024m_x0/vdif_packetizer_v15_x0/framecounter_v_mux0001_13)| 94    |
expres4g1024m_x0/vdif_packetizer_v15_2/old_epsecond_v_and0000(expres4g1024m_x0/vdif_packetizer_v15_2/old_epsecond_v_and00001:O)     | NONE(expres4g1024m_x0/vdif_packetizer_v15_2/old_epsecond_v)            | 1     |
expres4g1024m_x0/vdif_packetizer_v15_2/old_epsecond_v_and0001(expres4g1024m_x0/vdif_packetizer_v15_2/old_epsecond_v_and00011:O)     | NONE(expres4g1024m_x0/vdif_packetizer_v15_2/old_epsecond_v)            | 1     |
expres4g1024m_x0/vdif_packetizer_v15_x0/old_epsecond_v_and0000(expres4g1024m_x0/vdif_packetizer_v15_x0/old_epsecond_v_and00001:O)   | NONE(expres4g1024m_x0/vdif_packetizer_v15_x0/old_epsecond_v)           | 1     |
expres4g1024m_x0/vdif_packetizer_v15_x0/old_epsecond_v_and0001(expres4g1024m_x0/vdif_packetizer_v15_x0/old_epsecond_v_and00011:O)   | NONE(expres4g1024m_x0/vdif_packetizer_v15_x0/old_epsecond_v)           | 1     |
------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------+-------+

Timing Summary:
---------------
Speed Grade: -7

   Minimum period: 4.310ns (Maximum Frequency: 232.032MHz)
   Minimum input arrival time before clock: 2.990ns
   Maximum output required time after clock: 0.370ns
   Maximum combinational path delay: 0.000ns

Timing Detail:
--------------
All values displayed in nanoseconds (ns)

=========================================================================
Timing constraint: Default period analysis for Clock 'clk'
  Clock period: 4.310ns (frequency: 232.032MHz)
  Total number of paths / destination ports: 10162 / 3227
-------------------------------------------------------------------------
Delay:               4.310ns (Levels of Logic = 6)
  Source:            expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_1 (FF)
  Destination:       expres4g1024m_x0/vdif_packetizer_v15_2/dw64_target_minus1_v_7 (FF)
  Source Clock:      clk rising
  Destination Clock: clk rising

  Data Path: expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_1 to expres4g1024m_x0/vdif_packetizer_v15_2/dw64_target_minus1_v_7
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FD:C->Q              10   0.370   0.609  expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_1 (expres4g1024m_x0/vdif_packetizer_v15_2/s_dw64_per_frame_1)
     LUT3_D:I1->O          3   0.275   0.415  expres4g1024m_x0/vdif_packetizer_v15_x0/Msub_dw64_target_minus1_v_sub0000_xor(3)121 (expres4g1024m_x0/vdif_packetizer_v15_x0/N172)
     LUT4:I2->O            8   0.275   0.496  expres4g1024m_x0/vdif_packetizer_v15_2/Msub_dw64_target_minus1_v_sub0000_cy(3)1 (expres4g1024m_x0/vdif_packetizer_v15_2/Msub_dw64_target_minus1_v_sub0000_cy(3))
     LUT3_L:I2->LO         1   0.275   0.138  expres4g1024m_x0/vdif_packetizer_v15_2/Msub_dw64_target_minus1_v_sub0000_xor(8)131 (expres4g1024m_x0/vdif_packetizer_v15_2/N30)
     LUT4:I3->O            2   0.275   0.396  expres4g1024m_x0/vdif_packetizer_v15_2/Msub_dw64_target_minus1_v_sub0000_xor(7)18 (expres4g1024m_x0/vdif_packetizer_v15_2/Msub_dw64_target_minus1_v_sub0000_xor(7)1_map4)
     LUT4:I2->O            1   0.275   0.000  expres4g1024m_x0/vdif_packetizer_v15_2/Msub_dw64_target_minus1_v_sub0000_xor(7)133_F (N1347)
     MUXF5:I0->O           1   0.303   0.000  expres4g1024m_x0/vdif_packetizer_v15_2/Msub_dw64_target_minus1_v_sub0000_xor(7)133 (expres4g1024m_x0/vdif_packetizer_v15_2/dw64_target_minus1_v_sub0000(7))
     FDP:D                     0.208          expres4g1024m_x0/vdif_packetizer_v15_2/dw64_target_minus1_v_7
    ----------------------------------------
    Total                      4.310ns (2.256ns logic, 2.054ns route)
                                       (52.3% logic, 47.7% route)

=========================================================================
Timing constraint: Default OFFSET IN BEFORE for Clock 'clk'
  Total number of paths / destination ports: 2198 / 404
-------------------------------------------------------------------------
Offset:              2.990ns (Levels of Logic = 10)
  Source:            expres4g1024m_adc_user_datai0(0) (PAD)
  Destination:       expres4g1024m_x0/bitreducer8to2_v10_1/s0_mag (FF)
  Destination Clock: clk rising

  Data Path: expres4g1024m_adc_user_datai0(0) to expres4g1024m_x0/bitreducer8to2_v10_1/s0_mag
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     LUT2:I0->O            1   0.275   0.000  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_lut(0) (expres4g1024m_x0/bitreducer8to2_v10_1/N11)
     MUXCY:S->O            1   0.334   0.000  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(0) (expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(0))
     MUXCY:CI->O           1   0.036   0.000  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(1) (expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(1))
     MUXCY:CI->O           1   0.036   0.000  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(2) (expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(2))
     MUXCY:CI->O           1   0.036   0.000  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(3) (expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(3))
     MUXCY:CI->O           1   0.036   0.000  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(4) (expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(4))
     MUXCY:CI->O           1   0.036   0.000  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(5) (expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(5))
     MUXCY:CI->O           1   0.036   0.000  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(6) (expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(6))
     MUXCY:CI->O           1   0.416   0.467  expres4g1024m_x0/bitreducer8to2_v10_1/Mcompar_s0_mag_cmp_ge0000_cy(7) (expres4g1024m_x0/bitreducer8to2_v10_1/s0_mag_cmp_ge0000)
     LUT4:I0->O            1   0.275   0.331  expres4g1024m_x0/bitreducer8to2_v10_1/s0_mag_not00011 (expres4g1024m_x0/bitreducer8to2_v10_1/s0_mag_not0001)
     FDR:R                     0.536          expres4g1024m_x0/bitreducer8to2_v10_1/s0_mag
    ----------------------------------------
    Total                      2.990ns (2.191ns logic, 0.799ns route)
                                       (73.3% logic, 26.7% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'clk'
  Total number of paths / destination ports: 426 / 426
-------------------------------------------------------------------------
Offset:              0.370ns (Levels of Logic = 0)
  Source:            expres4g1024m_x0/dly21/srl_delay.synth_reg_srl_inst/partial_one.last_srl17e/reg_array[0].fde_used.u2 (FF)
  Destination:       expres4g1024m_ten_gbe1_tx_valid (PAD)
  Source Clock:      clk rising

  Data Path: expres4g1024m_x0/dly21/srl_delay.synth_reg_srl_inst/partial_one.last_srl17e/reg_array[0].fde_used.u2 to expres4g1024m_ten_gbe1_tx_valid
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FDE:C->Q              0   0.370   0.000  expres4g1024m_x0/dly21/srl_delay.synth_reg_srl_inst/partial_one.last_srl17e/reg_array[0].fde_used.u2 (expres4g1024m_ten_gbe1_tx_valid)
    ----------------------------------------
    Total                      0.370ns (0.370ns logic, 0.000ns route)
                                       (100.0% logic, 0.0% route)

=========================================================================
Timing constraint: Default path analysis
  Total number of paths / destination ports: 6 / 6
-------------------------------------------------------------------------
Delay:               0.000ns (Levels of Logic = 0)
  Source:            expres4g1024m_ten_gbe2_led_tx (PAD)
  Destination:       expres4g1024m_led1_gateway (PAD)

  Data Path: expres4g1024m_ten_gbe2_led_tx to expres4g1024m_led1_gateway
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
    ----------------------------------------
    Total                      0.000ns (0.000ns logic, 0.000ns route)

=========================================================================
CPU : 37.59 / 37.63 s | Elapsed : 38.00 / 38.00 s
 
--> 

Total memory usage is 271244 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings : 1671 (   0 filtered)
Number of infos    :   69 (   0 filtered)

