There have been problems with PCI-416M board locking up the whole PCI bus at random. Initially a software problem in ``pci416.o'' was suspected, but finally the supplier of the board, Datel, acknowledged that boards with AMCC ``S5933QB'' chips are vulnerable to PCI timing problems and that the chip should be replaced into a ``S5933QE''. This swap is scheduled for 2001.
The second prototype version of ``BEclock'' back-end clock generator box was built. It includes 5kHz active sampling filters for four differential input channels and a 1pps triggerable 10kHz sampling clock (synchronized to 5MHz H maser reference for absolute time tagging). A/D clock start is synchronized to station 1pps signal. 25 Hz Dicke switching control signals are being generated in-sync with sampling clock.
The ``BEClock'' box also includes a digital 5 MHz/1pps phase digitizer which samples and displays the timing difference of rising edges of 1pps and 5 MHz signals. The rising edges must be kept non-simultaneous to avoid problems in equipment relying on these signals.
Linux-based data acquisition software ``daqcon/daqcli'' was built to utilize the time synchronization provided by ``BEclock''. All further integration (beyond fixed 10kHz sampling) and handling of beam switching is done in ``daqcon'' software.
First prototypes of new total power differential instrumentation amplifiers were built and tested. These tests verified that to support high gains required by continuum observations a general total power level offset adjustment must be implemented, preferably under remote computer control.