1 Upgrade steps

Searching for S1883 UART data revealed that its maximum baud clock rate and the resulting maximum baud rate are far too low to support 115200~baud. However, we were able to find a pin-compatible replacement from Harris, the ``HD-6402''. It comes in two variants, HD-6402B for max.~8~MHz baud clock (500~kbaud) and HD-6402R for max.~2~MHz baud clock (125~kbaud). Both will do for this upgrade, but we naturally recommend HD-6402B as it leaves room for further speedup as high-speed serial cards for PCs may become available.

The baud clock frequency used by HD-6402 is 16 times the desired baud rate, as with S1883. This means that the existing baud clock generator can be used to generate existing baud rates, if desired.

Since the ``COM 5046'' baud rate generator chip will not run with much higher crystal frequencies than the current 5.0688~MHz, the easiest way to have a new ``permanent'' 1.8432~MHz oscillator would be to fit a crystal oscillator module with a TTL output into a wire-wrap socket.

For placement of the new oscillator, please refer to board layout diagram in 6004-014. Remove adequate number of wire-wrap pins of J1/J2 of section C to make room for two 14-pin wire-wrap sockets. Insert a 3.6864~MHz crystal oscillator module in the first socket and a 74LS74 in the other one.

The purpose of the jumper block is to enable to you easily switch back to the original 110--9600 baud baud rate generator.

The 1000~pF capacitor at D26 (schematics 6004-006) determines the delay which must elapse before the data buffer replies to any command. The value 1000~pF would result in nominal delay of 0.1~ms which is all right for 115200 baud use.

However, we suspect that most data buffers in the field have been equipped with 1~μF capacitors instead. The resulting 0.1~second delay was necessary to accommodate HP1000 half-duplex serial interfaces with a minimum ``turn-around'' time.

You must make sure that the capacitor at D26 is 1~nF.